MCQOPTIONS
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MCQOPTIONS
This section includes 10 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Organization knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
THE_PROCESS_WHEREIN_THE_PROCESSOR_CONSTANTLY_CHECKS_THE_STATUS_FLAGS_IS_CALLED_AS?$ |
| A. | Polling |
| B. | Inspection |
| C. | Reviewing |
| D. | Echoing |
| Answer» B. Inspection | |
| 2. |
THE_METHOD_WHICH_OFFERS_HIGHER_SPEEDS_OF_I/O_TRANSFERS_IS____________?$ |
| A. | Interrupts |
| B. | Memory mapping |
| C. | Program-controlled I/O |
| D. | DMA |
| Answer» E. | |
| 3. |
The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready i? |
| A. | Exceptions |
| B. | Signal handling |
| C. | Interrupts |
| D. | DMA |
| Answer» D. DMA | |
| 4. |
The method of accessing the I/O devices by repeatedly checking the status flags is ___________ |
| A. | Program-controlled I/O |
| B. | Memory-mapped I/O |
| C. | I/O mapped |
| D. | None of the mentioned |
| Answer» B. Memory-mapped I/O | |
| 5. |
To overcome the lag in the operating speeds of the I/O device and the processor we use ___________ |
| A. | BUffer spaces |
| B. | Status flags |
| C. | Interrupt signals |
| D. | Exceptions |
| Answer» C. Interrupt signals | |
| 6. |
The system is notified of a read or write operation by ___________ |
| A. | Appending an extra bit of the address |
| B. | Enabling the read or write bits of the devices |
| C. | Raising an appropriate interrupt signal |
| D. | Sending a special signal along the BUS |
| Answer» E. | |
| 7. |
The advantage of I/O mapped devices to memory mapped is ___________ |
| A. | The former offers faster transfer of data |
| B. | The devices connected using I/O mapping have a bigger buffer space |
| C. | The devices have to deal with fewer address lines |
| D. | No advantage as such |
| Answer» D. No advantage as such | |
| 8. |
In intel’s IA-32 architecture there is a separate 16 bit address space for the I/O devices?$ |
| A. | False |
| B. | True |
| Answer» C. | |
| 9. |
The usual BUS structure used to connect the I/O devices is ___________ |
| A. | Star BUS structure |
| B. | Multiple BUS structure |
| C. | Single BUS structure |
| D. | Node to Node BUS structure |
| Answer» D. Node to Node BUS structure | |
| 10. |
In memory-mapped I/O ____________ |
| A. | The I/O devices and the memory share the same address space |
| B. | The I/O devices have a separate address space |
| C. | The memory and I/O devices have an associated address space |
| D. | A part of the memory is specifically set aside for the I/O operation |
| Answer» B. The I/O devices have a separate address space | |