Consider the logic circuit given below.The inverter, AND, and OR gates – McqOptions

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1.	Consider the logic circuit given below.The inverter, AND, and OR gates have delays of 6, 10, and 11 nanoseconds respectively. Assuming that wire delays are negligible, What is the duration of glitch for Q before it becomes stable?
A.	5
B.	11
C.	16
D.	27
Answer» B. 11

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