Consider a new instruction named branch -on- bit -set (mnemonic bbs ).The instruction bbs reg pos label jumps to label if bit in position pos of register operand reg is one A register is 32 bits wide and the bits are numbered 0 to 31 bit in the following emuationof this instruction on a processor that does not have bbs implemented temp -----reg and mask Branch to label if temp is non -zero The variable temp is a temporary register For ocrrect emulation the variable mask must be generated by

Consider a new instruction named branch -on- bit -set (mnemonic bbs ).

1.	Consider a new instruction named branch -on- bit -set (mnemonic bbs ).The instruction bbs reg pos label jumps to label if bit in position pos of register operand reg is one A register is 32 bits wide and the bits are numbered 0 to 31 bit in the following emuationof this instruction on a processor that does not have bbs implemented temp -----reg and mask Branch to label if temp is non -zero The variable temp is a temporary register For ocrrect emulation the variable mask must be generated by
A.	mask----0x1< < pos
B.	mask ----0x ffffffff > > pos
C.	mask ----pos
D.	mask ----0xf
Answer» B. mask ----0x ffffffff > > pos

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Consider a new instruction named branch -on- bit -set (mnemonic bbs ).The instruction bbs reg pos label jumps to label if bit in position pos of register operand reg is one A register is 32 bits wide and the bits are numbered 0 to 31 bit in the following emuationof this instruction on a processor that does not have bbs implemented  temp -----reg and mask  Branch to label if temp is non -zero The variable temp is a temporary register For ocrrect emulation the variable mask must be generated by
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