MCQOPTIONS
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This section includes 6 Mcqs, each offering curated multiple-choice questions to sharpen your Vhdl knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Sensitivity list of a process contains __________$ |
| A. | Constants |
| B. | Signals |
| C. | Variables |
| D. | Literals |
| Answer» E. | |
| 2. |
Which of the following statement is used when there are no signals in the sensitive list? |
| A. | WHEN |
| B. | IF ELSE |
| C. | WAIT |
| D. | CASE |
| Answer» B. IF ELSE | |
| 3. |
Local variables in a process can be declared __________ |
| A. | Anywhere within the process |
| B. | After a sequential statement |
| C. | Before the BEGIN keyword |
| D. | After the BEGIN keyword |
| Answer» D. After the BEGIN keyword | |
| 4. |
A process has a declaration part. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 5. |
If there is more than one process in a VHDL code, How they are executed? |
| A. | One after the other |
| B. | Concurrently |
| C. | According to sensitivity list |
| D. | Sequentially |
| Answer» C. According to sensitivity list | |
| 6. |
Process is a _______ statement. |
| A. | Concurrent |
| B. | Sequential |
| C. | Delay |
| D. | Both concurrent and sequential |
| Answer» B. Sequential | |