Explore topic-wise MCQs in Vhdl.

This section includes 11 Mcqs, each offering curated multiple-choice questions to sharpen your Vhdl knowledge and support exam preparation. Choose a topic below to get started.

1.

A __________ can’t be declared inside a process.

A. Signal
B. Variable
C. Constants
D. Subprograms
Answer» B. Variable
2.

Which of the following statements can be seen as sequential equivalent to the selected concurrent assignment?

A. IF ELSE
B. WAIT
C. WHEN
D. CASE
Answer» E.
3.

If no signal in the sensitivity list is changed, then how many times the process will be executed?

A. 3
B. 2
C. 1
D. 0
Answer» D. 0
4.

It is mandatory to use a label for any process.

A. True
B. False
Answer» C.
5.

What is the effect of the sensitivity list on the process?

A. Process executes when any of the signal in sensitivity list changes
B. Process executes sequentially when sensitivity list is specified
C. If there is no sensitivity list, then the process will not execute
D. Helps in simulation
Answer» B. Process executes sequentially when sensitivity list is specified
6.

Which of the following statement is used when there are no signals in the sensitive list?

A. WHEN
B. IF ELSE
C. WAIT
D. CASE
Answer» D. CASE
7.

Sensitivity list of a process contains __________

A. Constants
B. Signals
C. Variables
D. Literals
Answer» C. Variables
8.

Local variables in a process can be declared __________

A. Anywhere within the process
B. After a sequential statement
C. Before the BEGIN keyword
D. After the BEGIN keyword
Answer» D. After the BEGIN keyword
9.

A process has a declaration part.

A. True
B. False
Answer» B. False
10.

If there is more than one process in a VHDL code, How they are executed?

A. One after the other
B. Concurrently
C. According to sensitivity list
D. Sequentially
Answer» C. According to sensitivity list
11.

Process is a _______ statement.

A. Concurrent
B. Sequential
C. Delay
D. Both concurrent and sequential
Answer» B. Sequential