MCQOPTIONS
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MCQOPTIONS
This section includes 14 Mcqs, each offering curated multiple-choice questions to sharpen your Vhdl knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Which of the following is a SUBTYPE of INTEGER? |
| A. | NATURAL |
| B. | REAL |
| C. | CHARACTER |
| D. | STD_LOGIC |
| Answer» B. REAL | |
| 2. |
User can define its own integer data type. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 3. |
Refer to the four declarations below, which of the following is not a 2 dimensional array? |
| A. | array4 |
| B. | array3 |
| C. | array2 |
| D. | array1View Answer |
| Answer» C. array2 | |
| 4. |
Look at the following declarations: How many total bits can be stored in these arrays? |
| A. | 16 |
| B. | 9 |
| C. | 64 |
| D. | 27View Answer |
| Answer» D. 27View Answer | |
| 5. |
Which of the following can’t be the value of x? Refer to the VHDL code given below. |
| A. | White |
| B. | Red |
| C. | Green |
| D. | BlueView Answer |
| Answer» B. Red | |
| 6. |
One can’t define an array without any constraints in VHDL. |
| A. | True |
| B. | False |
| Answer» C. | |
| 7. |
Which of the following is a wrong declaration for a new data type? |
| A. | TYPE my_logic IS RANGE 0 to 100; |
| B. | TYPE my_logic IS (‘0’, ‘1’, ‘2’); |
| C. | TYPE my_logic IS ARRAY (0 TO 3) OF BIT; |
| D. | TYPE my_logic IS <0 TO 20 > |
| Answer» E. | |
| 8. |
How the keyword “TYPE” is used? |
| A. | TYPE datatype_name IS type_from_predefined_datatypes; |
| B. | TYPE datatype_name IS datatype_range; |
| C. | TYPE datatype_range IS datatype_name; |
| D. | USE TYPE datatype_range IS datatype_name; |
| Answer» C. TYPE datatype_range IS datatype_name; | |
| 9. |
White |
| A. | Red |
| B. | Green |
| C. | Blue |
| Answer» D. | |
| 10. |
Which of the following is the correct syntax for declaring a SUBTYPE? |
| A. | TYPE type_name IS type_range AND SUBTYPE subtype_name IS subtype_range |
| B. | SUBTYPE subtype_name IS subtype_range TYPE type_name |
| C. | SUBTYPE subtype_name TYPE type_name IS subtype_range |
| D. | SUBTYPE subtype_name IS TYPE subtype_range |
| Answer» E. | |
| 11. |
A SUBTYPE can be defined as _________ |
| A. | A TYPE under a TYPE (nested) |
| B. | A type of INTEGER datatype |
| C. | A TYPE with some constraint |
| D. | A TYPE without any constraint |
| Answer» D. A TYPE without any constraint | |
| 12. |
One can’t define an array without any constraints in VHDL.$ |
| A. | True |
| B. | False |
| Answer» C. | |
| 13. |
Which of the following is wrong declaration for a new data type? |
| A. | TYPE my_logic IS RANGE 0 to 100; |
| B. | TYPE my_logic IS (‘0’, ‘1’, ‘2’); |
| C. | TYPE my_logic IS ARRAY (0 TO 3) OF BIT; |
| D. | TYPE my_logic IS <0 TO 20 > |
| Answer» E. | |
| 14. |
How the keyword “TYPE” is used? |
| A. | TYPE datatype_name IS type_from_predefined_datatypes; |
| B. | TYPE datatype_name IS datatype_range; |
| C. | TYPE datatype_range IS datatype_name; |
| D. | USE TYPE datatype_range IS datatype_name; |
| Answer» C. TYPE datatype_range IS datatype_name; | |