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This section includes 41 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Architecture knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The directory must be tracking the group of nodes which have a copy of the block; then the used set is called |
| A. | Dedicators |
| B. | Sharers |
| C. | Host |
| D. | Distributors |
| Answer» C. Host | |
| 2. |
The particular block's statuses of physical memory are normally kept in one location, called |
| A. | Register |
| B. | Directory |
| C. | Stack |
| D. | Queue |
| Answer» C. Stack | |
| 3. |
The pair of instructions including a special load known as a load-linked or load-locked with a special store called a |
| A. | Store linked |
| B. | Store locked |
| C. | Store conditional |
| D. | Store operational |
| Answer» D. Store operational | |
| 4. |
In the coherent multiprocessor, caches that is present provides both the migration and |
| A. | Coherence |
| B. | Recurrence |
| C. | Replication |
| D. | Uniformity |
| Answer» D. Uniformity | |
| 5. |
Cases where variables gets updated without the order of the synchronization are called |
| A. | Dedicators |
| B. | Sharers |
| C. | Data races |
| D. | Share races |
| Answer» D. Share races | |
| 6. |
One assigned operation for building synchronized operations, is called the |
| A. | Atom exchange |
| B. | Atomic exchange |
| C. | Remote node |
| D. | Both a and b |
| Answer» C. Remote node | |
| 7. |
All writing procedures for same location are seen having same order; the stated property is called |
| A. | Write serialization |
| B. | Read serialization |
| C. | Parallel processing |
| D. | Synchronization |
| Answer» B. Read serialization | |
| 8. |
For achieving a speedup up to 80 with 100 processors. What original computation fraction can be sequential |
| A. | 0.875 |
| B. | 0.9975 |
| C. | 1.9975 |
| D. | 2.9975 |
| Answer» C. 1.9975 | |
| 9. |
One that programming model which allows for having a more efficient implementation, is to suppose that programs are |
| A. | Remote |
| B. | Synchronized |
| C. | Atomic |
| D. | Shared |
| Answer» C. Atomic | |
| 10. |
Multiple-applications independently running, are typically called |
| A. | Multithreading |
| B. | Multiprogramming |
| C. | Multitasking |
| D. | Synchronization |
| Answer» C. Multitasking | |
| 11. |
The requesting node sending the requested data starting from the memory, and the requestor which has made the only sharing node, known as |
| A. | Write miss |
| B. | Write node |
| C. | Read miss |
| D. | Read node |
| Answer» D. Read node | |
| 12. |
Server clusters grow to 10th of thousands and beyond, are called |
| A. | Warehouse-scale computer |
| B. | Servers |
| C. | Kernel |
| D. | Supercomputers |
| Answer» B. Servers | |
| 13. |
The tightly coupled set of threads' execution working on a single task, that is called |
| A. | Multithreading |
| B. | Recurrence |
| C. | Parallel processing |
| D. | Serial processing |
| Answer» D. Serial processing | |
| 14. |
Microprocessors which are directly connected memory to a single-chip, that is sometimes called as |
| A. | Backside |
| B. | Memory bus |
| C. | Kernel |
| D. | both a and b |
| Answer» E. | |
| 15. |
From inter-processor communication, the misses arises are often called |
| A. | Coherence misses |
| B. | Commit misses |
| C. | Parallel processing |
| D. | Hit rate |
| Answer» B. Commit misses | |
| 16. |
When every cache hierarchy level is a subset of level which is further away from the processor, is refered to as |
| A. | Multilevel inclusion |
| B. | Synchronization |
| C. | Atomic synchronization |
| D. | Distributors |
| Answer» B. Synchronization | |
| 17. |
The node which has the memory location and the entry of directory of an address is |
| A. | Home node |
| B. | Guest node |
| C. | Host node |
| D. | All above |
| Answer» B. Guest node | |
| 18. |
Relaxing the W?R ordering, will yield a model known as |
| A. | Total store ordering |
| B. | Processor consistency |
| C. | Link locks |
| D. | Both a and b |
| Answer» E. | |
| 19. |
An operation being done in a way that intervening operation can be occurred, this operation is called a |
| A. | Atomic |
| B. | Molecular |
| C. | Multitasking |
| D. | Serial processing |
| Answer» B. Molecular | |
| 20. |
Fetch-and-increment is another task of the |
| A. | Atom exchange |
| B. | Atomic exchange |
| C. | Atomic synchronization |
| D. | None of above |
| Answer» D. None of above | |
| 21. |
The protocols for maintaining coherence of multiple processors are known as |
| A. | Data coherence protocols |
| B. | Commit coherence protocols |
| C. | Recurrence |
| D. | Cache coherence protocols |
| Answer» E. | |
| 22. |
Private data that is used by a single-processor, then shared data are used by |
| A. | Single processor |
| B. | Multi processor |
| C. | Single tasking |
| D. | Multi tasking |
| Answer» C. Single tasking | |
| 23. |
Relaxing the W?W ordering, will yield a model known as |
| A. | Total store ordering |
| B. | Partial store order |
| C. | Link locks |
| D. | Processor consistency |
| Answer» C. Link locks | |
| 24. |
To update the cached copies of the data item; is the alternative protocol which is known as |
| A. | Write update |
| B. | Write broadcast protocol |
| C. | Read protocol |
| D. | both a and b |
| Answer» E. | |
| 25. |
The term which is named as shared memory with both SMP and DSM referring that the address space is |
| A. | Multi-threading |
| B. | Recurrence |
| C. | Dedicated |
| D. | Shared memory |
| Answer» E. | |
| 26. |
Symmetric multiprocessors architectures, are sometimes known as |
| A. | Uniform memory access |
| B. | Static memory access |
| C. | Variable memory access |
| D. | All above |
| Answer» B. Static memory access | |
| 27. |
Two-way set associative having a 64-byte block, the single clock-cycle hit time is a |
| A. | Level 1 instruction cache |
| B. | Level 1 data cache |
| C. | Level 2 data cache |
| D. | Level 2 instruction cache |
| Answer» B. Level 1 data cache | |
| 28. |
When the home node being the local node, the copies may exist in a third node, called |
| A. | Home node |
| B. | Guest node |
| C. | Remote node |
| D. | Host node |
| Answer» D. Host node | |
| 29. |
A remote node is being the node which has a copy of a |
| A. | Home block |
| B. | Guest block |
| C. | Remote block |
| D. | Cache block |
| Answer» E. | |
| 30. |
The alternative design technique consists of multiprocessors having physically distributed memory, called |
| A. | Warehouse-scale |
| B. | Static memory access |
| C. | Distributed shared memory |
| D. | Shared memory |
| Answer» D. Shared memory | |
| 31. |
Only one node having a cache block copy, and this cache has written the block, and this memory copy is out of date. Then the processor is called the |
| A. | Host |
| B. | Owner |
| C. | Guest |
| D. | Server |
| Answer» C. Guest | |
| 32. |
Plotting performance versus number of processors, is refered to as |
| A. | Mortar shot graphs |
| B. | Flow chart |
| C. | K-Map |
| D. | Plotters |
| Answer» B. Flow chart | |
| 33. |
The alternative way of a snooping-based coherence protocol, is called a |
| A. | Memory protocol |
| B. | Directory protocol |
| C. | Register protocol |
| D. | None of above |
| Answer» C. Register protocol | |
| 34. |
The main objective in building the multimicroprocessor is |
| A. | greater throughput |
| B. | enhanced fault tolerance |
| C. | greater throughput and enhanced fault tolerance |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 35. |
The feature of multimicroprocessor architecture is |
| A. | task dependent |
| B. | single bus provider for many processors |
| C. | design is for a specific task |
| D. | all of the mentioned |
| Answer» E. | |
| 36. |
Memory management on a multiprocessor must deal with all of found on |
| A. | Uniprocessor Computer |
| B. | Computer |
| C. | Processor |
| D. | System |
| Answer» B. Computer | |
| 37. |
A multiprocessor operating system should perform |
| A. | a mechanism to split a task into concurrent subtasks |
| B. | optimise the system performance |
| C. | handling structural or architectural changes |
| D. | all of the mentioned |
| Answer» E. | |
| 38. |
A processor that continuously tries to acquire the locks, spinning around a loop till it reaches its success, is known as |
| A. | Spin locks |
| B. | Store locks |
| C. | Link locks |
| D. | Store operational |
| Answer» B. Store locks | |
| 39. |
An interface between the user or an application program, and the system resources is |
| A. | microprocessor |
| B. | microcontroller |
| C. | multimicroprocessor |
| D. | operating system |
| Answer» E. | |
| 40. |
The straight-forward model used for the memory consistency, is called |
| A. | Sequential consistency |
| B. | Random consistency |
| C. | Remote node |
| D. | Host node |
| Answer» B. Random consistency | |
| 41. |
If no node having a copy of a cache block, this technique is known as |
| A. | Uniform memory access |
| B. | Cached |
| C. | Un-cached |
| D. | Commit |
| Answer» D. Commit | |