Directions: The question consists of two statements, one labelled as ‘Statement (I)’ and the other labelled as ‘Statement (II)’. You are to examine these two statements carefully and select the answers to these items using the codes given below:Statement (I):A cache is a memory unit placed between the CPU and main memory M and is used to store instructions, data or both. Statement (II):The cache’s effect is to increase the average time required to access an instruction or data word, typically to just a single-clock cycle.

Statement (I) is false, but Statement (II) is true.

Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I).

Both Statement (I) and Statement (II) are individually true, but Statement (II) is not the correct explanation of Statement (I).

Statement (I) is true, but Statement (II) is false.

Statement (I) is false, but Statement (II) is true.

Given below are two statements: One is labelled as Assertion (A) and the other is labelled as Reason (R):Assertion (A): Random Access Memory (RAM) is volatile and stores data/programs currently in use.Reason (R): RAM is a storage medium that retains its contents even after the supply of electricity has been turned off.In the light of the above statements, choose the correct answer from the options given below:

Both (A) and (R) are true and (R) is the correct explanation of (A)

Both (A) and (R) are true but (R) is NOT the correct explanation of (A)

During direct memory access (DMA), the INTR and INTA (interrupt and interrupt acknowledge) lines:

are used by the DMA controller to acquire the data and address bus from the microprocessor

are used by the IO device to invoke an error routine if a problem occurs during DMA transfer

are used by the DMA controller to signal the microprocessor about the end of the current data

Consider allocation of memory to a new process. Assume that none of the existing holes in the memory will exactly fit the process’s memory requirement. Hence, a new hole of smaller size will be created if allocation is made in any of the existing holes. Which one of the following statements is TRUE?

The hole created by next fit is never larger than the hole created by best fit.

The hole created by first fit is always larger than the hole created by next fit.

The hole created by worst fit is always larger than the hole created by first fit.

The hole created by best fit is never larger than the hole created by first fit.

The hole created by next fit is never larger than the hole created by best fit.

Arrange the following units of computer memory in descending order of magnitude :byte, gigabyte, bit, megabyte, terrabyte

gigabyte, terrabyte, megabyte, bit, byte

terrabyte, gigabyte, megabyte, byte, bit

gigabyte, terrabyte, megabyte, bit, byte

gigabyte, megabyte, terrabyte, byte, bit

terrabyte, megabyte, gigabyte, bit, byte

Directions: Each of the items consist of two statements, one labeled as the ‘Statement (I)' and the other as ‘Statement (II)’ Examine these two statements carefully and select the answers to these items using the codes given below:Statement (I): In the main memory of a computer, RAM is used as short-term memory.Statement (II): RAM is a volatile memory.

Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I)

Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)

Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I)

Statement (I) is true but Statement (II) is false

Statement (I) is false but Statement (II) is true

Consider the following segment table in segmentation scheme:Segment IdBaseLimit0200200150001210215274983250050 What happens if the logical address requested is - Segment Id 2 and offset 1000?

Fetches the entry at the physical address 2527 for Segment Id 2

Fetches the entry at offset 27 in Segment Id 3

In the context operating systems, which of the following statements is/are correct with respect to paging?

Paging helps solve the issue of external fragmentation.

Paging incurs memory overheads.

Paging helps solve the issue of external fragmentation.

Page size has no impact on internal fragmentation.

Multi-level paging is necessary to support pages of different sizes.

Contiguous memory allocation having variable size partition suffers from:

Both External and Internal Fragmentation

Principle of "locality" is used in context of

Addressing lowest Memory address by microprocessor

Addressing Highest Memory address by microprocessor

Accessing Cache memory locations.

In a k-way set associative cache, the cache is divided into v sets, each of which consists of k lines.The lines of a set are placed in sequence one after another. The lines in set s are sequenced before the lines in set (s + 1). The main memory blocks are numbered 0 onwards. The main memory block numbered j must be mapped to any one of the cache lines from

(j mod v) to (j mod v) + (k - 1)

(j mod v) * k to (j mod v) * k + (k - 1)

(j mod v) to (j mod v) + (k - 1)

(j mod k) to (j mod k) + (v - 1)

(j mod k) * v to (j mod k) * v + (v - 1)

Of the following, which best characterizes computers that use memory-mapped I/O?

To perform I/O operations, it is sufficient to place the data in an address register and call channel to perform the operation

The computer provides special instructions for manipulating I/O ports

I/O ports are placed at addresses on the bus and are accessed just like other memory locations

To perform I/O operations, it is sufficient to place the data in an address register and call channel to perform the operation

I/O can be performed only when memory management hardware is turned on

373 + Mcqs in Memory management in Technical Programming Page 2 McqOptions

51.	On which of the following storage media, storage of information is organized as a single continuous spiral groove?
A.	Ram
B.	Floppy disk
C.	Hard disk
D.	CD-ROM
Answer» E.

Discussion

52.	A 26-bit address bus has maximum accessible memory capacity of ______
A.	64 MB
B.	16 MB
C.	1 GB
D.	4 GB
Answer» B. 16 MB

Discussion

53.	A 32 bit address bus allows access to a total memory of CPU
A.	64 MB
B.	1 GB
C.	4 GB
D.	6 GB
E.	2 GB
Answer» D. 6 GB

Discussion

54.	Match the Correct Memory Unitsa.4 bitp.1 MBb.1024 KBq.1 bytec.1024 TBr.1 nibbled.8 bits.1 PB A. a – r, b – p, c – s, d - qB. a – p, b – s, c – q, d – rC. a – r, b – s, c – q, d – pD. a – r, b – q, c – s, d - p
A.	A
B.	B
C.	D
D.	C
Answer» B. B

Discussion

55.	A combination of 16 bits is called
A.	word
B.	nibble
C.	memory block
D.	byte
Answer» B. nibble

Discussion

56.	1024 Kb= ____
A.	1 MB
B.	1 TB
C.	1 GB
D.	1 ZB
Answer» B. 1 TB

Discussion

57.	In Computer memory size K indicates Kilo, which is equal to
A.	1000
B.	1024
C.	100
D.	10000
Answer» C. 100

Discussion

58.	A computer system has a 4 K word cache organized in a block-set associative manner with 4 blocks per set, 64 words per block. The numbers of bits in the SET and WORD fields of the main memory address formula are respectively:
A.	15 and 4
B.	6 and 4
C.	7 and 2
D.	4 and 6
Answer» E.

Discussion

59.	A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4-way set associative. The minimum size of the TLB tag is
A.	11 bits
B.	13 bits
C.	15 bits
D.	20 bits
Answer» D. 20 bits

Discussion

60.	Directions: The question consists of two statements, one labelled as ‘Statement (I)’ and the other labelled as ‘Statement (II)’. You are to examine these two statements carefully and select the answers to these items using the codes given below:Statement (I):A cache is a memory unit placed between the CPU and main memory M and is used to store instructions, data or both. Statement (II):The cache’s effect is to increase the average time required to access an instruction or data word, typically to just a single-clock cycle.
A.	Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I).
B.	Both Statement (I) and Statement (II) are individually true, but Statement (II) is not the correct explanation of Statement (I).
C.	Statement (I) is true, but Statement (II) is false.
D.	Statement (I) is false, but Statement (II) is true.
Answer» D. Statement (I) is false, but Statement (II) is true.

Discussion

61.	Given below are two statements: One is labelled as Assertion (A) and the other is labelled as Reason (R):Assertion (A): Random Access Memory (RAM) is volatile and stores data/programs currently in use.Reason (R): RAM is a storage medium that retains its contents even after the supply of electricity has been turned off.In the light of the above statements, choose the correct answer from the options given below:
A.	Both (A) and (R) are true and (R) is the correct explanation of (A)
B.	Both (A) and (R) are true but (R) is NOT the correct explanation of (A)
C.	(A) is true but (R) is false
D.	(A) is false but (R) is true
Answer» D. (A) is false but (R) is true

Discussion

62.	During direct memory access (DMA), the INTR and INTA (interrupt and interrupt acknowledge) lines:
A.	are never used
B.	are used by the DMA controller to acquire the data and address bus from the microprocessor
C.	are used by the IO device to invoke an error routine if a problem occurs during DMA transfer
D.	are used by the DMA controller to signal the microprocessor about the end of the current data
Answer» B. are used by the DMA controller to acquire the data and address bus from the microprocessor

Discussion

63.	Consider allocation of memory to a new process. Assume that none of the existing holes in the memory will exactly fit the process’s memory requirement. Hence, a new hole of smaller size will be created if allocation is made in any of the existing holes. Which one of the following statements is TRUE?
A.	The hole created by first fit is always larger than the hole created by next fit.
B.	The hole created by worst fit is always larger than the hole created by first fit.
C.	The hole created by best fit is never larger than the hole created by first fit.
D.	The hole created by next fit is never larger than the hole created by best fit.
Answer» D. The hole created by next fit is never larger than the hole created by best fit.

Discussion

64.	A particular disk unit uses a bit string to record the occupancy or vacancy of its tracks, with 0 denoting vacant and I for occupied. A 32 – bit segment of this string has hexadecimal value D4FE2003. The percentage of occupied tracks for the corresponding part of the disk, to the nearest percentage, is
A.	12
B.	25
C.	38
D.	44
Answer» E.

Discussion

65.	How many 32 K × 1 RAM chips are needed to provide a memory capacity of 256 K-bytes ?
A.	8
B.	32
C.	64
D.	128
Answer» D. 128

Discussion

66.	Dynamic memory is made up of
A.	flip flop
B.	MOS transistor gate
C.	magnetic core
D.	magnetic bubbles
Answer» C. magnetic core

Discussion

67.	200 μs should be the memory size of a digital storage oscilloscope to be able to record a transient of 10 seconds with a time resolution of 200 μs?
A.	200 K
B.	50 K
C.	2 M
D.	None of the above
Answer» C. 2 M

Discussion

68.	Arrange the following units of computer memory in descending order of magnitude :byte, gigabyte, bit, megabyte, terrabyte
A.	terrabyte, gigabyte, megabyte, byte, bit
B.	gigabyte, terrabyte, megabyte, bit, byte
C.	gigabyte, megabyte, terrabyte, byte, bit
D.	terrabyte, megabyte, gigabyte, bit, byte
Answer» B. gigabyte, terrabyte, megabyte, bit, byte

Discussion

69.	Both RAM and ROM are
A.	Random access memory
B.	Sequential access memory
C.	Read and write memory
D.	Read only memory
Answer» B. Sequential access memory

Discussion

70.	1024 Kb = ____
A.	1 MB
B.	1 TB
C.	1 GB
D.	1 ZB
E.	1 PB
Answer» B. 1 TB

Discussion

71.	Directions: Each of the items consist of two statements, one labeled as the ‘Statement (I)' and the other as ‘Statement (II)’ Examine these two statements carefully and select the answers to these items using the codes given below:Statement (I): In the main memory of a computer, RAM is used as short-term memory.Statement (II): RAM is a volatile memory.
A.	Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)
B.	Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I)
C.	Statement (I) is true but Statement (II) is false
D.	Statement (I) is false but Statement (II) is true
Answer» B. Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I)

Discussion

72.	A magnetic disk has 100 cylinders, each with 10 tracks of 10 sectors. If each sector contains 128 bytes, what is the maximum capacity of the disk in kilobytes?
A.	1,280,000
B.	1280
C.	1250
D.	128,000
Answer» D. 128,000

Discussion

73.	A hard disk system has the following parameters Number of track = 500Number of sectors/track = 100Number of bytes/sector = 500Time taken by the head to move from one track to adjacent track = 1 msRotation speed = 600 rpmWhat is the average time taken for transferring 250 bytes from the disk?
A.	300.5 ms
B.	255.5 ms
C.	255 ms
D.	300 ms
Answer» E.

Discussion

74.	Consider the following segment table in segmentation scheme:Segment IdBaseLimit0200200150001210215274983250050 What happens if the logical address requested is - Segment Id 2 and offset 1000?
A.	Fetches the entry at the physical address 2527 for Segment Id 2
B.	A trap is generated
C.	Deadlock
D.	Fetches the entry at offset 27 in Segment Id 3
Answer» C. Deadlock

Discussion

75.	A hard disk is divided into tracks which are further subdivided into
A.	clusters
B.	sectors
C.	vectors
D.	heads
Answer» C. vectors

Discussion

76.	In Distributed system, the capacity of a system to adapt the increased service load is called _______.
A.	Tolerance
B.	Scalability
C.	Capability
D.	Loading
Answer» C. Capability

Discussion

77.	Consider the following statements:S1: A small page size causes large page tables.S2: Internal fragmentation is increased with small pages.S3: I/O transfers are more efficient with large pages.Which of the following is true?
A.	S1 and S2 are true
B.	S1 is true and S2 is false
C.	S2 and S3 are true
D.	S1 is true S3 is false
Answer» C. S2 and S3 are true

Discussion

78.	In the context operating systems, which of the following statements is/are correct with respect to paging?
A.	Paging incurs memory overheads.
B.	Paging helps solve the issue of external fragmentation.
C.	Page size has no impact on internal fragmentation.
D.	Multi-level paging is necessary to support pages of different sizes.
Answer» B. Paging helps solve the issue of external fragmentation.

Discussion

79.	If T is the capacity of a track in bytes, and S is the capacity of each surface in byte, then (T, S) = _____.
A.	(50 K, 50000 K)
B.	(25 K, 25000 K)
C.	(25 K, 50000 K)
D.	(40 K, 36000 K)
Answer» D. (40 K, 36000 K)

Discussion

80.	A type of memory in which the stored data is not lost when the power is turned off is called
A.	magnetic memory
B.	non-volatile memory
C.	volatile memory
D.	semiconductor memory
Answer» C. volatile memory

Discussion

81.	Four memory chips of 16 × 4 size have their address busses connected together. The system will be of size
A.	256 × 1
B.	64 × 64
C.	16 × 16
D.	32 × 8
Answer» C. 16 × 16

Discussion

82.	_________ is a memory management scheme that permits the physical address space of a process to be noncontiguous.
A.	Segmentation
B.	Paging
C.	Fragmentation
D.	Swapping
Answer» C. Fragmentation

Discussion

83.	An access sequence of cache block addresses is of length N and contains n unique block addresses. The number of unique block addresses between two consecutive accesses to the same block address is bounded above by k. What is the miss ratio it the access sequence is passed through a cache of associativity A ≥ k exercising least-recently-used replacement policy?
A.	n/N
B.	1/N
C.	1/A
D.	k/n
Answer» B. 1/N

Discussion

84.	A core of processor chip consists of1. ALU2. Instruction logic3. Load/store logic4. L3 cache5. L1 data cache
A.	1, 2, 3 and 4 only
B.	1, 2, 3 and 5 only
C.	2, 3, 4 and 5 only
D.	1, 4 and 5 only
Answer» C. 2, 3, 4 and 5 only

Discussion

85.	___________ performs the task of allocation and deallocation of memory space to program.
A.	Process Management
B.	Memory Management
C.	Device management
D.	Secondary storage management
Answer» C. Device management

Discussion

86.	Floppy disk is
A.	a primary memory
B.	cache memory
C.	nothing but hard disk
D.	used for backup purpose
Answer» E.

Discussion

87.	How many bits are there in one byte?
A.	2
B.	8
C.	10
D.	16
Answer» C. 10

Discussion

88.	Contiguous memory allocation having variable size partition suffers from:
A.	External Fragmentation
B.	Internal Fragmentation
C.	Both External and Internal Fragmentation
D.	None of the options
Answer» B. Internal Fragmentation

Discussion

89.	Principle of "locality" is used in context of
A.	Addressing lowest Memory address by microprocessor
B.	Addressing Highest Memory address by microprocessor
C.	Accessing Cache memory locations.
D.	None of above.
Answer» D. None of above.

Discussion

90.	______ is a small, portable ﬂash memory card that plugs into a computer’s USB port and functions as a portable hard drive.
A.	CD-ROM
B.	Flash drive
C.	DVD-ROM
D.	CD-RW
Answer» C. DVD-ROM

Discussion

91.	Given that the main memory access time is 1200 ns and cache access time is 100 ns. The average memory access time is not to exceed 120 ns. The hit ratio for the cache must be at least
A.	90%
B.	98%
C.	80%
D.	75%
Answer» C. 80%

Discussion

92.	Consider a single-level page table system. with the page table stored in the memory. If the hit rate to TLB is 80%, and it takes 15 nanoseconds to search the TLB. and 150 nanoseconds to access the main memory, then what is the effective memory access time, in nanoseconds ?
A.	185
B.	195
C.	205
D.	175
Answer» C. 205

Discussion

93.	A semiconductor device that stores and modifies information while the computer is operating, but that also retains information when the computer is turned OFF is called
A.	Flash Memory
B.	Buffer Memory
C.	Random Access Memory
D.	Fuzzy Memory
Answer» D. Fuzzy Memory

Discussion

94.	Consider the disk which has average seek time of 32 ns and rotational rate of 360 rpm(round per minute), Each track of the disk has 512 sectors, each of size 512 bytes.What is the time taken to read four continuous sectors? And What is the data transfer rate?
A.	0.1043s and 1736 KBps
B.	0.0843s and 1536 KBps
C.	0.0443s and 936 KBps
D.	0.0943s and 1636 KBps
Answer» C. 0.0443s and 936 KBps

Discussion

95.	In a k-way set associative cache, the cache is divided into v sets, each of which consists of k lines.The lines of a set are placed in sequence one after another. The lines in set s are sequenced before the lines in set (s + 1). The main memory blocks are numbered 0 onwards. The main memory block numbered j must be mapped to any one of the cache lines from
A.	(j mod v) * k to (j mod v) * k + (k - 1)
B.	(j mod v) to (j mod v) + (k - 1)
C.	(j mod k) to (j mod k) + (v - 1)
D.	(j mod k) * v to (j mod k) * v + (v - 1)
Answer» B. (j mod v) to (j mod v) + (k - 1)

Discussion

96.	A computer has a single cache (off-chip) with a 3 ns hit time and a 95% hit rate. Main memory has a 50 ns access time. If we add an on-chip cache with a 0.6 ns hit time and a 98% hit rate, the computer's effective access time:
A.	2.8 ns
B.	5.5 ns
C.	0.7 ns
D.	None of these
Answer» D. None of these

Discussion

97.	CD-ROM is a ______.
A.	MP3 file
B.	Microprocessor
C.	Magnetic disk
D.	Storage medium
Answer» E.

Discussion

98.	In a cache with 64-bytes cache lines, how many bits are used to determine which byte within a cache line an address points to?
A.	16
B.	8
C.	6
D.	3
Answer» D. 3

Discussion

99.	A RAM chip has a capacity of 1024 words of 8 bits each (1K × 8). The number of 2 × 4 decoders with enable line needed to construct a 32K × 8 RAM from 1K × 8 RAM is:
A.	4
B.	5
C.	6
D.	7
Answer» C. 6

Discussion

100.	Of the following, which best characterizes computers that use memory-mapped I/O?
A.	The computer provides special instructions for manipulating I/O ports
B.	I/O ports are placed at addresses on the bus and are accessed just like other memory locations
C.	To perform I/O operations, it is sufficient to place the data in an address register and call channel to perform the operation
D.	I/O can be performed only when memory management hardware is turned on
Answer» C. To perform I/O operations, it is sufficient to place the data in an address register and call channel to perform the operation

Discussion

Explore topic-wise MCQs in Technical Programming.

On which of the following storage media, storage of information is organized as a single continuous spiral groove?

A 26-bit address bus has maximum accessible memory capacity of ______

A 32 bit address bus allows access to a total memory of CPU

Match the Correct Memory Unitsa.4 bitp.1 MBb.1024 KBq.1 bytec.1024 TBr.1 nibbled.8 bits.1 PB A. a – r, b – p, c – s, d - qB. a – p, b – s, c – q, d – rC. a – r, b – s, c – q, d – pD. a – r, b – q, c – s, d - p

A combination of 16 bits is called

1024 Kb= ____

In Computer memory size K indicates Kilo, which is equal to

A computer system has a 4 K word cache organized in a block-set associative manner with 4 blocks per set, 64 words per block. The numbers of bits in the SET and WORD fields of the main memory address formula are respectively:

A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4-way set associative. The minimum size of the TLB tag is

During direct memory access (DMA), the INTR and INTA (interrupt and interrupt acknowledge) lines:

How many 32 K × 1 RAM chips are needed to provide a memory capacity of 256 K-bytes ?

Dynamic memory is made up of

200 μs should be the memory size of a digital storage oscilloscope to be able to record a transient of 10 seconds with a time resolution of 200 μs?

Arrange the following units of computer memory in descending order of magnitude :byte, gigabyte, bit, megabyte, terrabyte

Both RAM and ROM are

1024 Kb = ____

A magnetic disk has 100 cylinders, each with 10 tracks of 10 sectors. If each sector contains 128 bytes, what is the maximum capacity of the disk in kilobytes?

A hard disk system has the following parameters Number of track = 500Number of sectors/track = 100Number of bytes/sector = 500Time taken by the head to move from one track to adjacent track = 1 msRotation speed = 600 rpmWhat is the average time taken for transferring 250 bytes from the disk?

Consider the following segment table in segmentation scheme:Segment IdBaseLimit0200200150001210215274983250050 What happens if the logical address requested is - Segment Id 2 and offset 1000?

A hard disk is divided into tracks which are further subdivided into

In Distributed system, the capacity of a system to adapt the increased service load is called _______.

Consider the following statements:S1: A small page size causes large page tables.S2: Internal fragmentation is increased with small pages.S3: I/O transfers are more efficient with large pages.Which of the following is true?

In the context operating systems, which of the following statements is/are correct with respect to paging?

If T is the capacity of a track in bytes, and S is the capacity of each surface in byte, then (T, S) = _____.

A type of memory in which the stored data is not lost when the power is turned off is called

Four memory chips of 16 × 4 size have their address busses connected together. The system will be of size

_________ is a memory management scheme that permits the physical address space of a process to be noncontiguous.

A core of processor chip consists of1. ALU2. Instruction logic3. Load/store logic4. L3 cache5. L1 data cache

___________ performs the task of allocation and deallocation of memory space to program.

Floppy disk is

How many bits are there in one byte?

Contiguous memory allocation having variable size partition suffers from:

Principle of "locality" is used in context of

______ is a small, portable ﬂash memory card that plugs into a computer’s USB port and functions as a portable hard drive.

Given that the main memory access time is 1200 ns and cache access time is 100 ns. The average memory access time is not to exceed 120 ns. The hit ratio for the cache must be at least

Consider a single-level page table system. with the page table stored in the memory. If the hit rate to TLB is 80%, and it takes 15 nanoseconds to search the TLB. and 150 nanoseconds to access the main memory, then what is the effective memory access time, in nanoseconds ?

A semiconductor device that stores and modifies information while the computer is operating, but that also retains information when the computer is turned OFF is called

Consider the disk which has average seek time of 32 ns and rotational rate of 360 rpm(round per minute), Each track of the disk has 512 sectors, each of size 512 bytes.What is the time taken to read four continuous sectors? And What is the data transfer rate?

A computer has a single cache (off-chip) with a 3 ns hit time and a 95% hit rate. Main memory has a 50 ns access time. If we add an on-chip cache with a 0.6 ns hit time and a 98% hit rate, the computer's effective access time:

CD-ROM is a ______.

In a cache with 64-bytes cache lines, how many bits are used to determine which byte within a cache line an address points to?

A RAM chip has a capacity of 1024 words of 8 bits each (1K × 8). The number of 2 × 4 decoders with enable line needed to construct a 32K × 8 RAM from 1K × 8 RAM is:

Of the following, which best characterizes computers that use memory-mapped I/O?