Explore topic-wise MCQs in Computer Organization.

This section includes 10 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Organization knowledge and support exam preparation. Choose a topic below to get started.

1.

CONSIDER_A_MEMORY_ORGANISED_INTO_8K_ROWS,_AND_THAT_IT_TAKES_4_CYCLES_TO_COMPLETE_A_READ_OPERATION._THEN_THE_REFRESH_OVERHEAD_OF_THE_CHIP_IS_______?$

A. 0.0021
B. 0.0038
C. 0.0064
D. 0.0128
Answer» C. 0.0064
2.

When DRAM’s are used to build a complex large memory, then the controller only provides the refresh counter.$#

A. True
B. False
Answer» B. False
3.

The RAS and CAS signals are provided by the _____?

A. Mode register
B. CS
C. Memory controller
D. None of the mentioned
Answer» D. None of the mentioned
4.

The controller multiplexes the addresses after getting the _____ signal.

A. INTR
B. ACK
C. RESET
D. Request
Answer» E.
5.

The address lines multiplexing is done using ______

A. MMU
B. Memory controller unit
C. Page table
D. Overlay generator
Answer» C. Page table
6.

The higher order bits of the address are used to _____

A. Specify the row address
B. Specify the column address
C. Input the CS
D. None of the mentioned
Answer» B. Specify the column address
7.

The SRAM’s are basically used as ______$

A. Registers
B. Caches
C. TLB
D. Buffer
Answer» C. TLB
8.

The less space consideration as lead to the development of ________ (for large memories).

A. SIMM’s
B. DIMS’s
C. SRAM’s
D. Both SIMM’s and DIMS’s
Answer» E.
9.

To organise large memory chips we make use of ______

A. Integrated chips
B. Upgraded hardware
C. Memory modules
D. None of the mentioned
Answer» D. None of the mentioned
10.

The chip can be disabled or cut off from an external connection using ______

A. Chip select
B. LOCK
C. ACPT
D. RESET
Answer» B. LOCK