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This section includes 9 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
1. |
THE_INTR_INTERRUPT_MAY_BE_MASKED_USING_THE_FLAG?$ |
A. | direction flag |
B. | overflow flag |
C. | interrupt flag |
D. | sign flag |
Answer» D. sign flag | |
2. |
The Programmable interrupt controller is required t? |
A. | handle one interrupt request |
B. | handle one or more interrupt requests at a time |
C. | handle one or more interrupt requests with a delay |
D. | handle no interrupt request |
Answer» C. handle one or more interrupt requests with a delay | |
3. |
The INTR interrupt may be |
A. | maskable |
B. | nonmaskable |
C. | maskable and nonmaskable |
D. | none of the mentioned |
Answer» B. nonmaskable | |
4. |
If any interrupt request given to an input pin cannot be disabled by any means then the input pin is called |
A. | maskable interrupt |
B. | nonmaskable interrupt |
C. | maskable interrupt and nonmaskable interrupt |
D. | none of the mentioned |
Answer» C. maskable interrupt and nonmaskable interrupt | |
5. |
NMI stands for |
A. | nonmaskable interrupt |
B. | nonmultiple interrupt |
C. | nonmovable interrupt |
D. | none of the mentioned |
Answer» B. nonmultiple interrupt | |
6. |
Whenever a number of devices interrupt a CPU at a time, and if the processor is able to handle them properly, it is said to have |
A. | interrupt handling ability |
B. | interrupt processing ability |
C. | multiple interrupt processing ability |
D. | multiple interrupt executing ability |
Answer» D. multiple interrupt executing ability | |
7. |
While executing the main program, if two or more interrupts occur, then the sequence of appearance of interrupts is called |
A. | multi-interrupt |
B. | nested interrupt |
C. | interrupt within interrupt |
D. | nested interrupt and interrupt within interrupt |
Answer» E. | |
8. |
An interrupt breaks the execution of instructions and diverts its execution to |
A. | Interrupt service routine |
B. | Counter word register |
C. | Execution unit |
D. | control unit |
Answer» B. Counter word register | |
9. |
While CPU is executing a program, an interrupt exists then it |
A. | follows the next instruction in the program |
B. | jumps to instruction in other registers |
C. | breaks the normal sequence of execution of instructions |
D. | stops executing the program |
Answer» D. stops executing the program | |