2291 + Mcqs in Digital Electronics Page 28 McqOptions

1351.	In VHDL, each instance of a component is given a name followed by a ________ and the name of the library primitive.
A.	function
B.	signal
C.	semicolon
D.	colon
Answer» E.

Discussion

1352.	The duty cycle of a 555 timer configured as a basic astable multivibrator is controlled by ________.
A.	one resistor
B.	two resistors
C.	one capacitor
D.	a resistor and a capacitor
Answer» E.

Discussion

1353.	The major advantage of a Schmitt trigger input is that it ________.
A.	avoids erratic triggering
B.	has more triggering methods
C.	has a wider range of outputs
D.	can be retriggered
Answer» B. has more triggering methods

Discussion

1354.	A flip-flop operation is described as a toggle when the result after a clock is ________.
A.	<img src="/_files/images/digital-electronics/digital-systems/fba5_1022a1.jpeg">
B.	<img src="/_files/images/digital-electronics/digital-systems/fba5_1022b1.jpeg">
C.	<img src="/_files/images/digital-electronics/digital-systems/fba5_1022c1.jpeg">
D.	<img src="/_files/images/digital-electronics/digital-systems/fba5_1022d1.jpeg">
E.	change to opposite states
Answer» E. change to opposite states

Discussion

1355.	The asynchronous inputs on a J-K flip-flop ________.
A.	are normally not at the active level at the same time
B.	take precedence over the J and K inputs
C.	do not require a clock pulse to affect the output
D.	all of the above
Answer» E.

Discussion

1356.	A positive edge-triggered flip-flop will accept inputs only when the clock ________.
A.	is LOW
B.	changes from HIGH to LOW
C.	is HIGH
D.	changes from LOW to HIGH
Answer» E.

Discussion

1357.	A retriggerable one-shot has a pulse width of 10 ms; 3 ms after being triggered, another trigger pulse is applied. The resulting output pulse will be ________ mS.
A.	3
B.	7
C.	10
D.	13
Answer» E.

Discussion

1358.	The main advantage of bipolar (TTL) memories over MOS memories is speed.
A.	True
B.	False
Answer» C.

Discussion

1359.	Testing and troubleshooting the decoding logic will not reveal problems with the memory chips and their connections to the CPU busses.
A.	True
B.	False
Answer» B. False

Discussion

1360.	Once a PROM is programmed it can be changed by applying a small electrical charge.
A.	True
B.	False
Answer» C.

Discussion

1361.	In a register stack, data moves up but not down.
A.	True
B.	False
Answer» C.

Discussion

1362.	A CD player is an example of a device that has random access capability.
A.	True
B.	False
Answer» B. False

Discussion

1363.	In a parity generator circuit, an error is signaled on an error indicator.
A.	True
B.	False
Answer» C.

Discussion

1364.	One of the advantages of DRAMs is their ability to store data without needing periodic refreshment of the memory contents.
A.	True
B.	False
Answer» C.

Discussion

1365.	ROM is a type of memory in which data are stored permanently or semipermanently.
A.	True
B.	False
Answer» B. False

Discussion

1366.	EEPROMS can be electrically erased and reused.
A.	True
B.	False
Answer» B. False

Discussion

1367.	The exclusive-OR is written in a Boolean equation as a plus sign with a circle around it.
A.	True
B.	False
Answer» B. False

Discussion

1368.	Parity generator and checker circuits are available in single IC packages.
A.	True
B.	False
Answer» B. False

Discussion

1369.	Main computer memory is usually DRAM because of its high density and low cost; cache memory is usually SRAM because of its high speed.
A.	True
B.	False
Answer» B. False

Discussion

1370.	The Ex-NOR is sometimes called the equality gate.
A.	True
B.	False
Answer» B. False

Discussion

1371.	A parity checker is constructed in the same way as a parity generator, except that in a 4-bit system there must be five inputs, and the output is used as the error indicator.
A.	True
B.	False
Answer» B. False

Discussion

1372.	Address multiplexing is used to reduce the number of address lines.
A.	True
B.	False
Answer» B. False

Discussion

1373.	Most flash chips use a bulk erase operation in which all cells on the chip are erased simultaneously.
A.	True
B.	False
Answer» B. False

Discussion

1374.	Information stored in an EPROM can be erased by prolonged exposure to ultraviolet light.
A.	True
B.	False
Answer» B. False

Discussion

1375.	A typical RAM will write (store data internally) whenever the Chip Select line is active and the Write Enable line is inactive.
A.	True
B.	False
Answer» C.

Discussion

1376.	When two or more devices try to send their own digital levels to a shared data bus at the same time, bus contention will take place.
A.	True
B.	False
Answer» B. False

Discussion

1377.	A write operation may also be referred to as a "fetch" operation.
A.	True
B.	False
Answer» C.

Discussion

1378.	PROMs are basically the same as mask ROMs, once they have been programmed.
A.	True
B.	False
Answer» B. False

Discussion

1379.	RAM is nonvolatile.
A.	True
B.	False
Answer» C.

Discussion

1380.	A nibble is a group of eight bits.
A.	True
B.	False
Answer» C.

Discussion

1381.	Cache memory is used in high-speed systems.
A.	True
B.	False
Answer» B. False

Discussion

1382.	Dynamic memories, such as the 2118 16K 1 RAM, have to multiplex the address bus.
A.	True
B.	False
Answer» B. False

Discussion

1383.	Fusible-link PROMs are programmed by removing the desired fuse links using a microscope and tweezers.
A.	True
B.	False
Answer» C.

Discussion

1384.	When a computer is executing a program of instructions, the CPU continually fetches information from those locations in memory that contain (1) the program codes representing the operations to be performed and (2) the data to be operated upon.
A.	True
B.	False
Answer» B. False

Discussion

1385.	A ROM that allows the user to program data into the chip by permanently opening fusible links is the EPROM.
A.	True
B.	False
Answer» C.

Discussion

1386.	If data is brought into the J terminal and its complement to the K terminal, a J-K flip-flop operates as a(n) ________.
A.	S-C flip-flop
B.	D flip-flop
C.	gated S-C flip-flop
D.	TOGGLE flip-flop
Answer» C. gated S-C flip-flop

Discussion

1387.	The term hold always means ________.
A.	<img src="/_files/images/digital-electronics/digital-systems/fba5_1016a1.jpeg" align="center">
B.	<img src="/_files/images/digital-electronics/digital-systems/fba5_1016b1.jpeg" align="center">
C.	<img src="/_files/images/digital-electronics/digital-systems/fba5_1016c1.jpeg" align="center">
D.	no change
Answer» E.

Discussion

1388.	The point(s) on this timing diagram where the Q output of a D latch will be HIGH is/are ________.
A.	point 4
B.	points 3 and 4
C.	points 1 and 2
D.	points 4 and 5
Answer» B. points 3 and 4

Discussion

1389.	A major drawback to an latch is its ________.
A.	complexity
B.	slow speed
C.	invalid condition
D.	latch mode
Answer» D. latch mode

Discussion

1390.	An astable multivibrator is a circuit that ________.
A.	has two stable states
B.	is free-running
C.	produces a continuous output signal
D.	is free-running and produces a continuous output signal
Answer» D. is free-running and produces a continuous output signal

Discussion

1391.	Setup time specifies ________.
A.	the minimum time for the control levels to be maintained on the inputs prior to the triggering edge of the clock in order for data to be reliably clocked into the FF
B.	the maximum time interval required for the control levels to remain on the inputs before the triggering edge of the clock in order for the data to be reliably clocked out of the FF
C.	how long the operator has in order to get the flip-flop running before the maximum power level is exceeded
D.	how long it takes the output to change states after the clock has transitioned
Answer» B. the maximum time interval required for the control levels to remain on the inputs before the triggering edge of the clock in order for the data to be reliably clocked out of the FF

Discussion

1392.	A J-K flip-flop and associated waveforms are shown below. The circuit is operating properly.
A.	True
B.	False
Answer» C.

Discussion

1393.	Using knowledge from previous chapters, an S-R flip-flop circuit is easy to design.
A.	True
B.	False
Answer» B. False

Discussion

1394.	Inputs that cause the output of a flip-flop to change instantaneously are asynchronous.
A.	True
B.	False
Answer» B. False

Discussion

1395.	A one-shot is a special type of multivibrator that must be triggered to produce each output pulse.
A.	True
B.	False
Answer» B. False

Discussion

1396.	The Q output of a flip-flop is normally HIGH when the device is in the "CLEAR" or "RESET" state.
A.	True
B.	False
Answer» C.

Discussion

1397.	An astable multivibrator is sometimes referred to as a clock.
A.	True
B.	False
Answer» B. False

Discussion

1398.	The 7476 and 74LS76 are both dual flip-flops.
A.	True
B.	False
Answer» B. False

Discussion

1399.	The J-K flip-flop is a standard building block of clocked (sequential) logic circuits known as logic standard primitives.
A.	True
B.	False
Answer» C.

Discussion

1400.	Connecting components together using HDL is not difficult.
A.	True
B.	False
Answer» B. False

Discussion

Explore topic-wise MCQs in Engineering.

In VHDL, each instance of a component is given a name followed by a ________ and the name of the library primitive.

The duty cycle of a 555 timer configured as a basic astable multivibrator is controlled by ________.

The major advantage of a Schmitt trigger input is that it ________.

A flip-flop operation is described as a toggle when the result after a clock is ________.

The asynchronous inputs on a J-K flip-flop ________.

A positive edge-triggered flip-flop will accept inputs only when the clock ________.

A retriggerable one-shot has a pulse width of 10 ms; 3 ms after being triggered, another trigger pulse is applied. The resulting output pulse will be ________ mS.

The main advantage of bipolar (TTL) memories over MOS memories is speed.

Testing and troubleshooting the decoding logic will not reveal problems with the memory chips and their connections to the CPU busses.

Once a PROM is programmed it can be changed by applying a small electrical charge.

In a register stack, data moves up but not down.

A CD player is an example of a device that has random access capability.

In a parity generator circuit, an error is signaled on an error indicator.

One of the advantages of DRAMs is their ability to store data without needing periodic refreshment of the memory contents.

ROM is a type of memory in which data are stored permanently or semipermanently.

EEPROMS can be electrically erased and reused.

The exclusive-OR is written in a Boolean equation as a plus sign with a circle around it.

Parity generator and checker circuits are available in single IC packages.

Main computer memory is usually DRAM because of its high density and low cost; cache memory is usually SRAM because of its high speed.

The Ex-NOR is sometimes called the equality gate.

A parity checker is constructed in the same way as a parity generator, except that in a 4-bit system there must be five inputs, and the output is used as the error indicator.

Address multiplexing is used to reduce the number of address lines.

Most flash chips use a bulk erase operation in which all cells on the chip are erased simultaneously.

Information stored in an EPROM can be erased by prolonged exposure to ultraviolet light.

A typical RAM will write (store data internally) whenever the Chip Select line is active and the Write Enable line is inactive.

When two or more devices try to send their own digital levels to a shared data bus at the same time, bus contention will take place.

A write operation may also be referred to as a "fetch" operation.

PROMs are basically the same as mask ROMs, once they have been programmed.

RAM is nonvolatile.

A nibble is a group of eight bits.

Cache memory is used in high-speed systems.

Dynamic memories, such as the 2118 16K 1 RAM, have to multiplex the address bus.

Fusible-link PROMs are programmed by removing the desired fuse links using a microscope and tweezers.

When a computer is executing a program of instructions, the CPU continually fetches information from those locations in memory that contain (1) the program codes representing the operations to be performed and (2) the data to be operated upon.

A ROM that allows the user to program data into the chip by permanently opening fusible links is the EPROM.

If data is brought into the J terminal and its complement to the K terminal, a J-K flip-flop operates as a(n) ________.

The term hold always means ________.

The point(s) on this timing diagram where the Q output of a D latch will be HIGH is/are ________.

A major drawback to an latch is its ________.

An astable multivibrator is a circuit that ________.

Setup time specifies ________.

A J-K flip-flop and associated waveforms are shown below. The circuit is operating properly.

Using knowledge from previous chapters, an S-R flip-flop circuit is easy to design.

Inputs that cause the output of a flip-flop to change instantaneously are asynchronous.

A one-shot is a special type of multivibrator that must be triggered to produce each output pulse.

The Q output of a flip-flop is normally HIGH when the device is in the "CLEAR" or "RESET" state.

An astable multivibrator is sometimes referred to as a clock.

The 7476 and 74LS76 are both dual flip-flops.

The J-K flip-flop is a standard building block of clocked (sequential) logic circuits known as logic standard primitives.

Connecting components together using HDL is not difficult.