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This section includes 187 Mcqs, each offering curated multiple-choice questions to sharpen your Electrical Engineering knowledge and support exam preparation. Choose a topic below to get started.
1. |
Convert hexadecimal value C1 to binary. |
A. | 11000001 |
B. | 1000111 |
C. | 111000100 |
D. | 111000001 |
Answer» B. 1000111 | |
2. |
Convert decimal 64 to binary. |
A. | 01010010 |
B. | 01000000 |
C. | 00110110 |
D. | 01001000 |
Answer» C. 00110110 | |
3. |
Assign the proper odd parity bit to the code 111001. |
A. | 1111011 |
B. | 1111001 |
C. | 0111111 |
D. | 0011111 |
Answer» C. 0111111 | |
4. |
Which is typically the longest: bit, byte, nibble, word? |
A. | bit |
B. | byte |
C. | nibble |
D. | word |
Answer» E. | |
5. |
Convert 8B3F16 to binary. |
A. | 35647 |
B. | 011010 |
C. | 1011001111100011 |
D. | 1000101100111111 |
Answer» E. | |
6. |
Convert 59.7210 to BCD. |
A. | 111011 |
B. | 01011001.01110010 |
C. | 1110.11 |
D. | 0101100101110010 |
Answer» C. 1110.11 | |
7. |
If a typical PC uses a 20-bit address code, how much memory can the CPU address? |
A. | 20 mb |
B. | 10 mb |
C. | 1 mb |
D. | 580 mb |
Answer» D. 580 mb | |
8. |
Which of the following is the most widely used alphanumeric code for computer input and output? |
A. | gray |
B. | ascii |
C. | parity |
D. | ebcdic |
Answer» C. parity | |
9. |
One hex digit is sometimes referred to as a(n): |
A. | byte |
B. | nibble |
C. | grouping |
D. | instruction |
Answer» C. grouping | |
10. |
Convert the binary number 1001.00102 to decimal. |
A. | 90.125 |
B. | 9.125 |
C. | 125 |
D. | 12.5 |
Answer» C. 125 | |
11. |
Convert binary 111111110010 to hexadecimal. |
A. | ee216 |
B. | ff216 |
C. | 2fe16 |
D. | fd216 |
Answer» C. 2fe16 | |
12. |
Convert the following decimal number to 8-bit binary. |
A. | 101110112 |
B. | 110111012 |
C. | 101111012 |
D. | 101111002 |
Answer» B. 110111012 | |
13. |
Convert hexadecimal value 16 to decimal. |
A. | 2210 |
B. | 1610 |
C. | 1010 |
D. | 2010 |
Answer» B. 1610 | |
14. |
How many pins are in an EDF10K70 package? |
A. | 70 |
B. | 140 |
C. | 240 |
D. | 532 |
Answer» D. 532 | |
15. |
PALs tend to execute ________ logic. |
A. | sap |
B. | sop |
C. | pla |
D. | spd |
Answer» C. pla | |
16. |
The GAL16V8 has: |
A. | 16 dedicated inputs. |
B. | 8 special function pins. |
C. | 8 pins that are used as inputs or outputs. |
D. | all of the above |
Answer» D. all of the above | |
17. |
ALM is the acronym for ________. |
A. | array logic matrix |
B. | arithmetic logic module |
C. | asynchronous local modulator |
D. | adaptive logic module |
Answer» E. | |
18. |
The difference between a PLA and a PAL is: |
A. | the pla has a programmable or plane and a programmable and plane, while the pal only has a programmable and plane. |
B. | the pal has a programmable or plane and a programmable and plane, while the pla only has a programmable and plane. |
C. | the pal has more possible product terms than the pla. |
D. | pals and plas are the same thing. |
Answer» B. the pal has a programmable or plane and a programmable and plane, while the pla only has a programmable and plane. | |
19. |
The condition occurring when two or more devices try to write data to a bus simultaneously is called ________. |
A. | address decoding |
B. | bus contention |
C. | bus collisions |
D. | address multiplexing |
Answer» C. bus collisions | |
20. |
In a DRAM, what is the state of R/W during a read operation? |
A. | low |
B. | high |
C. | hi-z |
D. | none of the above |
Answer» C. hi-z | |
21. |
The storage element for a static RAM is the ________. |
A. | diode |
B. | resistor |
C. | capacitor |
D. | flip-flop |
Answer» E. | |
22. |
What is the meaning of RAM, and what is its primary role? |
A. | readily available memory; it is the first level of memory used by the computer in all of its operations. |
B. | random access memory; it is memory that can be reached by any sub- system within a computer, and at any time. |
C. | random access memory; it is the memory used for short-term temporary data storage within the computer. |
D. | resettable automatic memory; it is memory that can be used and then automatically reset, or cleared, after being read from or written to. |
Answer» D. resettable automatic memory; it is memory that can be used and then automatically reset, or cleared, after being read from or written to. | |
23. |
Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) and displays the waveforms shown in figure (b). The actual analyzer display shows all four data outputs, Q0-Q3. The analyzer's cursor is placed at position X and all four of the data output lines show a LOW level output. What is wrong, if anything, with the circuit? |
A. | nothing is wrong, according to the display. the outputs are in the open state and should show zero output voltage. |
B. | the circuit is in the read mode and the outputs, q0-q3, should reflect the contents of the memory at that address. the chip is defective; replace the chip. |
C. | the circuit is in the mode and should be writing the contents of the selected address to q0–q3. |
D. | the q0–q3 lines can be either low or high, since the chip is in the tristate mode in which case their level is unpredictable. |
Answer» E. | |
24. |
The check sum method of testing a ROM: |
A. | indicates if the data in more than one memory location is incorrect. |
B. | provides a means for locating and correcting data errors in specific memory locations. |
C. | allows data errors to be pinpointed to a specific memory location. |
D. | simply indicates that the contents of the rom are incorrect. |
Answer» E. | |
25. |
How many address bits are needed to select all memory locations in the 2118 16K × 1 RAM? |
A. | 8 |
B. | 10 |
C. | 14 |
D. | 16 |
Answer» D. 16 | |
26. |
What do we call the manipulation of an analog signal in a digital domain? |
A. | analog-to-digital conversion |
B. | digital-to-analog conversion |
C. | digital signal processing |
D. | signal filtering |
Answer» C. digital signal processing | |
27. |
If a DAC has a full-scale, or maximum, output of 12 V and accuracy of 0.1%, then the maximum error for any output voltage is ________. |
A. | 12 v |
B. | 120 mv |
C. | 12 mv |
D. | 0 v |
Answer» D. 0 v | |
28. |
Which is a typical application of digital signal processing? |
A. | noise elimination |
B. | music signal processing |
C. | image processing |
D. | all of the above |
Answer» E. | |
29. |
Which A/D conversion method has a fixed conversion time? |
A. | single-slope analog-to-digital converter |
B. | dual-slope analog-to-digital converter |
C. | digital-ramp analog-to-digital converter |
D. | successive-approximation analog-to-digital converter |
Answer» E. | |
30. |
What is the result of taking more samples during the quantization process? |
A. | more errors in the analog-to-digital conversion |
B. | more bit requirements |
C. | more accurate signal representation |
D. | more bit requirements and more accurate signal representation |
Answer» E. | |
31. |
Which of the following circuit parameters would be most likely to limit the maximum operating frequency of a flip-flop? |
A. | setup and hold time |
B. | clock pulse high and low time |
C. | propagation delay time |
D. | clock transition time |
Answer» D. clock transition time | |
32. |
A Schmitt trigger has VT+ = 2.0 V and VT– = 1.2 V. What is the hysteresis voltage of the Schmitt trigger? |
A. | 0.4 volt |
B. | 0.6 volt |
C. | 0.8 volt |
D. | 1.2 volts |
Answer» D. 1.2 volts | |
33. |
Why would a delay gate be needed for a digital circuit? |
A. | a delay gate is never needed. |
B. | to provide for setup times |
C. | to provide for hold times |
D. | to provide for setup times and hold times |
Answer» E. | |
34. |
The ________ circuit overcomes the problem of switching caused by jitter on the inputs. |
A. | astable multivibrator |
B. | monostable multivibrator |
C. | bistable multivibrator |
D. | schmitt trigger |
Answer» E. | |
35. |
How many flip-flops are required to produce a divide-by-128 device? |
A. | 1 |
B. | 4 |
C. | 6 |
D. | 7 |
Answer» E. | |
36. |
How is a J-K flip-flop made to toggle? |
A. | j = 0, k = 0 |
B. | j = 1, k = 0 |
C. | j = 0, k = 1 |
D. | j = 1, k = 1 |
Answer» E. | |
37. |
Propagation delay time, tPLH, is measured from the ________. |
A. | triggering edge of the clock pulse to the low-to-high transition of the output |
B. | triggering edge of the clock pulse to the high-to-low transition of the output |
C. | preset input to the low-to-high transition of the output |
D. | clear input to the high-to-low transition of the output |
Answer» B. triggering edge of the clock pulse to the high-to-low transition of the output | |
38. |
Which statement BEST describes the operation of a negative-edge-triggered D flip-flop? |
A. | the logic level at the d input is transferred to q on ngt of clk. |
B. | the q output is always identical to the clk input if the d input is high. |
C. | the q output is always identical to the d input when clk = pgt. |
D. | the q output is always identical to the d input. |
Answer» B. the q output is always identical to the clk input if the d input is high. | |
39. |
Determine the output frequency for a frequency division circuit that contains 12 flip-flops with an input clock frequency of 20.48 MHz. |
A. | 10.24 khz |
B. | 5 khz |
C. | 30.24 khz |
D. | 15 khz |
Answer» C. 30.24 khz | |
40. |
Settling time is normally defined as the time it takes a DAC to settle within ________. |
A. | 1/8 lsb of its final value when a change occurs in the input code |
B. | 1/4 lsb of its final value when a change occurs in the input code |
C. | 1/2 lsb of its final value when a change occurs in the input code |
D. | 1 lsb of its final value when a change occurs in the input code |
Answer» D. 1 lsb of its final value when a change occurs in the input code | |
41. |
Which of the following best defines Nyquist frequency? |
A. | the frequency of resonance for the filtering circuit |
B. | the second harmonic |
C. | the lower frequency limit of sampling |
D. | the highest frequency component of a given analog signal |
Answer» E. | |
42. |
Which is not an A/D conversion error? |
A. | differential nonlinearity |
B. | missing code |
C. | incorrect code |
D. | offset |
Answer» B. missing code | |
43. |
Which type of programming is typically used for digital signal processors? |
A. | assembly language |
B. | machine language |
C. | c |
D. | none of the above |
Answer» B. machine language | |
44. |
How are unwanted frequencies removed prior to digital conversion? |
A. | pre-filters |
B. | digital signal processing |
C. | sample-and-hold circuits |
D. | all of the above |
Answer» B. digital signal processing | |
45. |
The resolution of a 6-bit DAC is ________. |
A. | 63% |
B. | 64% |
C. | 15.9% |
D. | 1.59% |
Answer» E. | |
46. |
A binary-weighted-input digital-to-analog converter has a feedback resistor, Rf, of 12 k. If 50 A of current is through the resistor, voltage out of the circuit is ________. |
A. | 0.6 v |
B. | –0.6 v |
C. | 0.1 v |
D. | –0.1 v |
Answer» C. 0.1 v | |
47. |
A 4-bit R/2R ladder digital-to-analog converter uses ________. |
A. | one resistor value |
B. | two resistor values |
C. | three resistor values |
D. | four resistor values |
Answer» C. three resistor values | |
48. |
In a digital representation of voltages using an 8-bit binary code, how many values can be defined? |
A. | 16 |
B. | 64 |
C. | 128 |
D. | 256 |
Answer» E. | |
49. |
The ADC0804 is an example of a ________. |
A. | single-slope analog-to-digital converter |
B. | dual-slope analog-to-digital converter |
C. | digital-ramp analog-to-digital converter |
D. | successive-approximation analog-to-digital converter |
Answer» E. | |
50. |
The dual-slope analog-to-digital converter finds extensive use in ________. |
A. | digital voltmeters |
B. | function generators |
C. | frequency counters |
D. | all of the above |
Answer» E. | |