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This section includes 187 Mcqs, each offering curated multiple-choice questions to sharpen your Electrical Engineering knowledge and support exam preparation. Choose a topic below to get started.
51. |
An op-amp has very ________. |
A. | high voltage gain |
B. | high input impedance |
C. | low output impedance |
D. | all of the above |
Answer» E. | |
52. |
Which term applies to the maintaining of a given signal level until the next sampling? |
A. | holding |
B. | aliasing |
C. | shannon frequency sampling |
D. | "stair-stepping" |
Answer» B. aliasing | |
53. |
In a flash analog-to-digital converter, the output of each comparator is connected to an input of a ________. |
A. | decoder |
B. | priority encoder |
C. | multiplexer |
D. | demultiplexer |
Answer» C. multiplexer | |
54. |
Show from the truth table how an exclusive-OR gate can be used to invert the data on one input if the other input is a special control function. |
A. | using a as the control, when a = 0, x is the same as b. when a = 1, x is the same as b. |
B. | using a as the control, when a = 0, x is the same as b. when a = 1, x is the inverse of b. |
C. | using a as the control, when a = 0, x is the inverse of b. when a = 1, x is the same as b. |
D. | using a as the control, when a = 0, x is the inverse of b. when a = 1, x is the inverse of b. |
Answer» C. using a as the control, when a = 0, x is the inverse of b. when a = 1, x is the same as b. | |
55. |
Which type of gate can be used to add two bits? |
A. | ex-or |
B. | ex-nor |
C. | ex-nand |
D. | nor |
Answer» B. ex-nor | |
56. |
Parity systems are defined as either________ or ________ and will add an extra ________ tothe digital information being transmitted. |
A. | positive, negative, byte |
B. | odd, even, bit |
C. | upper, lower, digit |
D. | on, off, decimal |
Answer» C. upper, lower, digit | |
57. |
Identify the type of gate below from the equation |
A. | ex-nor gate |
B. | or gate |
C. | ex-or gate |
D. | nand gate |
Answer» D. nand gate | |
58. |
A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n): |
A. | ex-nor gate |
B. | or gate |
C. | ex-or gate |
D. | nand gate |
Answer» D. nand gate | |
59. |
A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n): |
A. | ex-nor gate |
B. | or gate |
C. | ex-or gate |
D. | nand gate |
Answer» B. or gate | |
60. |
Select the statement that best describes the parity method of error detection: |
A. | parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. |
B. | parity checking is not suitable for detecting single-bit errors in transmitted codes. |
C. | parity checking is best suited for detecting single-bit errors in transmitted codes. |
D. | parity checking is capable of detecting and correcting errors in transmitted codes. |
Answer» D. parity checking is capable of detecting and correcting errors in transmitted codes. | |
61. |
In a certain digital waveform, the period is four times the pulse width. The duty cycle is ________. |
A. | 0% |
B. | 25% |
C. | 50% |
D. | 100% |
Answer» C. 50% | |
62. |
Digital signals transmitted on a single conductor (and a ground) must be transmitted in: |
A. | slow speed. |
B. | parallel. |
C. | analog. |
D. | serial. |
Answer» E. | |
63. |
A flip-flop has ________. |
A. | one stable state |
B. | no stable states |
C. | two stable states |
D. | none of the above |
Answer» D. none of the above | |
64. |
A demultiplexer has ________. |
A. | one data input and a number of selection inputs, and they have several outputs |
B. | one input and one output |
C. | several inputs and several outputs |
D. | several inputs and one output |
Answer» B. one input and one output | |
65. |
Which of the following is not an analog device? |
A. | thermocouple |
B. | current flow in a circuit |
C. | light switch |
D. | audio microphone |
Answer» D. audio microphone | |
66. |
The output of an OR gate is LOW when ________. |
A. | all inputs are low |
B. | any input is low |
C. | any input is high |
D. | all inputs are high |
Answer» B. any input is low | |
67. |
The output of a NOT gate is HIGH when ________. |
A. | the input is low |
B. | the input is high |
C. | the input changes from low to high |
D. | voltage is removed from the gate |
Answer» B. the input is high | |
68. |
A DAC changes ________. |
A. | an analog signal into digital data |
B. | digital data into an analog signal |
C. | digital data into an amplified signal |
D. | none of the above |
Answer» C. digital data into an amplified signal | |
69. |
A decoder converts ________. |
A. | noncoded information into coded form |
B. | coded information into noncoded form |
C. | highs to lows |
D. | lows to highs |
Answer» C. highs to lows | |
70. |
Parallel format means that: |
A. | each digital signal has its own conductor. |
B. | several digital signals are sent on each conductor. |
C. | both binary and hexadecimal can be used. |
D. | no clock is needed. |
Answer» B. several digital signals are sent on each conductor. | |
71. |
Give the decimal value of binary 10010. |
A. | 610 |
B. | 910 |
C. | 1810 |
D. | 2010 |
Answer» D. 2010 | |
72. |
The output of an AND gate is LOW ________. |
A. | all the time |
B. | when any input is low |
C. | when any input is high |
D. | when all inputs are high |
Answer» C. when any input is high | |
73. |
A full subtracter circuit requires ________. |
A. | two inputs and two outputs |
B. | two inputs and three outputs |
C. | three inputs and one output |
D. | three inputs and two outputs |
Answer» E. | |
74. |
What are the symbols used to represent digits in the binary number system? |
A. | 0,1 |
B. | 0,1,2 |
C. | 0 through 8 |
D. | 1,2 |
Answer» B. 0,1,2 | |
75. |
What is a digital-to-analog converter? |
A. | it takes the digital information from an audio cd and converts it to a usable form. |
B. | it allows the use of cheaper analog techniques, which are always simpler. |
C. | it stores digital data on a hard drive. |
D. | it converts direct current to alternating current. |
Answer» B. it allows the use of cheaper analog techniques, which are always simpler. | |
76. |
The range of voltages between VL(max) and VH(min) are ________. |
A. | unknown |
B. | unnecessary |
C. | unacceptable |
D. | between 2 v and 5 v |
Answer» D. between 2 v and 5 v | |
77. |
The generic array logic (GAL) device is ________. |
A. | one-time programmable |
B. | reprogrammable |
C. | a cmos device |
D. | reprogrammable and a cmos device |
Answer» C. a cmos device | |
78. |
Which of the following statements does NOT describe an advantage of digital technology? |
A. | the values may vary over a continuous range. |
B. | the circuits are less affected by noise. |
C. | the operation can be programmed. |
D. | information storage is easy. |
Answer» B. the circuits are less affected by noise. | |
79. |
In the decimal numbering system, what is the MSD? |
A. | the middle digit of a stream of numbers |
B. | the digit to the right of the decimal point |
C. | the last digit on the right |
D. | the digit with the most weight |
Answer» E. | |
80. |
Any number with an exponent of zero is equal to: |
A. | zero |
B. | one |
C. | that number |
D. | ten |
Answer» C. that number | |
81. |
ECL was invented in                by |
A. | 1956, baker clamp |
B. | 1976, james r. biard |
C. | 1956, hannon s. yourke |
D. | 1976, yourke |
Answer» D. 1976, yourke | |
82. |
The full form of CML is |
A. | complementary mode logic |
B. | current mode logic |
C. | collector mode logic |
D. | collector mixed logic |
Answer» D. collector mixed logic | |
83. |
Fan-in is defined as |
A. | the number of outputs connected to gate without any degradation in the voltage levels |
B. | the number of inputs connected to gate without any degradation in the voltage levels |
C. | the number of outputs connected to gate with degradation in the voltage levels |
D. | the number of inputs connected to gate with degradation in the voltage levels |
Answer» C. the number of outputs connected to gate with degradation in the voltage levels | |
84. |
The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as |
A. | noise margin |
B. | noise immunity |
C. | white noise |
D. | signal to noise ratio |
Answer» C. white noise | |
85. |
Power Dissipation in DIC is expressed in |
A. | watts or kilowatts |
B. | milliwatts or nanowatts |
C. | db |
D. | mdb |
Answer» C. db | |
86. |
Propagation delay times can be divided as |
A. | t(plh) and t(lph) |
B. | t(lph) and t(phl) |
C. | t(plh) and t(phl) |
D. | t(hpl) and t(lph) |
Answer» D. t(hpl) and t(lph) | |
87. |
CMOS refers to |
A. | continuous metal oxide semiconductor |
B. | complementary metal oxide semiconductor |
C. | centred metal oxide semiconductor |
D. | concrete metal oxide semiconductor |
Answer» C. centred metal oxide semiconductor | |
88. |
Propagation delay is defined as |
A. | the time taken for the output of a gate to change after the inputs have changed |
B. | the time taken for the input of a gate to change after the outputs have changed |
C. | the time taken for the input of a gate to change after the intermediates have changed |
D. | the time taken for the output of a gate to change after the intermediates have changed |
Answer» B. the time taken for the input of a gate to change after the outputs have changed | |
89. |
Logic circuits can also be designed using |
A. | ram |
B. | rom |
C. | pld |
D. | pla |
Answer» D. pla | |
90. |
To construct 16K * 4-bit memory, how many 4116 ICs are required? |
A. | 1 |
B. | 2 |
C. | 3 |
D. | 4 |
Answer» E. | |
91. |
The first step in the design of memory decoder is |
A. | selection of a eprom |
B. | selection of a ram |
C. | address assignment |
D. | data insertion |
Answer» D. data insertion | |
92. |
What is access time? |
A. | the time taken to move a stored word from one bit to other bits after applying the address bits |
B. | the time taken to write a word after applying the address bits |
C. | the time taken to read a stored word after applying the address bits |
D. | the time taken to erase a stored word after applying the address bits |
Answer» D. the time taken to erase a stored word after applying the address bits | |
93. |
To read from the memory, the select input and the power down/program input must be |
A. | high |
B. | low |
C. | sometimes high and sometimes low |
D. | alternate high and low |
Answer» C. sometimes high and sometimes low | |
94. |
How many 8 k × 1 RAMs are required to achieve a memory with a word capacity of 8 k and a word length of eight bits? |
A. | eight |
B. | two |
C. | one |
D. | four |
Answer» B. two | |
95. |
Why are ROMs called non-volatile memory? |
A. | they lose memory when power is removed |
B. | they do not lose memory when power is removed |
C. | they lose memory when power is supplied |
D. | they do not lose memory when power is supplied |
Answer» C. they lose memory when power is supplied | |
96. |
Data stored in an electronic memory cell can be accessed at random and on demand |
A. | erom |
B. | ram |
C. | prom |
D. | eeprom |
Answer» B. ram | |
97. |
A flip flop stores |
A. | 10 bit of information |
B. | 1 bit of information |
C. | 2 bit of information |
D. | 3-bit information |
Answer» C. 2 bit of information | |
98. |
3 CYCLES AND RACES, STATE REDUCTION |
A. | 1 |
B. | 2 |
C. | 3 |
D. | 4 |
Answer» D. 4 | |
99. |
What is the static charge that can be stored by your body as you walk across a carpet? |
A. | 300 volts |
B. | 3000 volts |
C. | 30000 volts |
D. | over 30000 volts |
Answer» E. | |
100. |
Which of the following will not normally be found on a data sheet? |
A. | minimum high level output voltage |
B. | maximum low level output voltage |
C. | minimum low level output voltage |
D. | maximum high level input current |
Answer» D. maximum high level input current | |