MCQOPTIONS
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MCQOPTIONS
This section includes 657 Mcqs, each offering curated multiple-choice questions to sharpen your Testing Subject knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
9: Consider an RS lip-lops with both inputs set to 0. If a momentary '1' is applied at the input S,then the output |
| A. | q will flip from 0 to 1 and then back to 0 |
| B. | q will flip from 0 to 1 and then back to 0 |
| C. | q will flip from 1 to 0 |
| D. | q will flip from 0 to 1 |
| Answer» E. | |
| 2. |
8: A JK flip-lop has its J input connected to logic level 1 and its input to the Q output. A clock pulse is fed to its clock input. The flip-lop will now |
| A. | change its state at each clock pulse |
| B. | go to state 1 and stay there |
| C. | go to state 0 and stay there |
| D. | retain its previous state |
| Answer» E. | |
| 3. |
What is the maximum counting speed of a 4-bit binary counter which is composed of flip-flops with a propagation delay of 25 ns ? |
| A. | 1 mhz |
| B. | 10 mhz |
| C. | 100 mhz |
| D. | 8 mhz |
| Answer» C. 100 mhz | |
| 4. |
A mod-2 counter followed by a mod-5 counter is |
| A. | same as a mode-5 counter followed by a mod- 2 counter |
| B. | a decade counter |
| C. | a mod-7 counter |
| D. | ripple carry counter |
| Answer» B. a decade counter | |
| 5. |
4: How many gates (minimum) are needed for a 3-bit up-counter using standard binary and using T lip-lops ? Assume unlimited fan-in. |
| A. | 6 |
| B. | 3 |
| C. | 2 |
| D. | 1 |
| Answer» D. 1 | |
| 6. |
5: The clear data and present input of the JK lip-lop are known as |
| A. | synchronous inputs |
| B. | directed inputs |
| C. | either (a) or (b) |
| D. | none of thes |
| Answer» D. none of thes | |
| 7. |
3: Flip-flop outputs are always |
| A. | complimentary |
| B. | the same |
| C. | independent of each other |
| D. | same as previous input |
| Answer» B. the same | |
| 8. |
2: The number of flip-flops required in a modulo N counter is |
| A. | log2 (n) + 1 |
| B. | log2(n-1) |
| C. | log2 (n) |
| D. | n log2 (n) |
| Answer» D. n log2 (n) | |
| 9. |
1: When the maximum clock rate is quoted for a logic family, then it applies to a |
| A. | shift register |
| B. | flip-flop |
| C. | counter |
| D. | multiplexe r |
| Answer» C. counter | |
| 10. |
An astable has two metastable states and produces the function of a digital oscillator |
| A. | true |
| B. | false |
| Answer» B. false | |
| 11. |
In synchronous counters the clock input of each of the bistables are connected together so that each changes state at the same time. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 12. |
Which of the following is not a form of multivibrator? |
| A. | astable. |
| B. | monostable. |
| C. | tristable. |
| D. | bistable. |
| Answer» D. bistable. | |
| 13. |
A combinatorial logic circuit has memory characteristics that "remember" the inputs after they have been removed. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 14. |
A master/slave bistable is formed using two bistable connected in series. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 15. |
A J-K flip-flop has two control inputs. What happens to the Q output on the active edge of the clock if both control inputs are asserted simultaneously? |
| A. | the q output toggles to the other state. |
| B. | the q output is set to 1. |
| C. | the q output is reset to 0. |
| D. | the q output remains unchanged . |
| Answer» B. the q output is set to 1. | |
| 16. |
In true sum-of-products expressions, the inversion signs cannot cover more than single variables in a term. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 17. |
An encoder in which the highest and lowest value input digits are encoded simultaneously is known as a priority encoder. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 18. |
Single looping in groups of three is a common K-map simplification technique. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 19. |
Three select lines are required to address four data input lines. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 20. |
The CASE control structure is used when an expression has a list of possible values. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 21. |
The following combination is correct for an EVEN parity data transmission system: data = 100111100 and parity = 0 |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 22. |
An exclusive-OR gate will invert a signal on one input if the other is always HIGH. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 23. |
A digital circuit that converts coded information into a familiar or non- coded form is known as an encoder. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 24. |
A data selector is also called a demultiplexer. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 25. |
A pull-up resistor is a resistor used to keep a given point in a circuit HIGH when in the active state. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 26. |
The look-ahead carry method suffers from propagation delays. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 27. |
Even parity is the condition of having an even number of 1s in every group of bits. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 28. |
The K-map provides a "graphical" approach to simplifying sum-of- products expressions. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 29. |
When decisions demand one of many possible actions, the ELSIF control structure is used. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 30. |
The XOR gate will produce a HIGH output if only one but not both of the inputs is HIGH. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 31. |
The following combination is correct for an ODD parity data transmission system: data = 011011100 and parity = 0 |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 32. |
In an even-parity system, the parity bit is adjusted to make an even number of one bits. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 33. |
In an even-parity system, the following data will produce a parity bit = 1. data = 1010011 |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 34. |
The abbreviation for an exclusive-OR gate is XOR. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 35. |
This is an example of a POS expression: |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 36. |
The 54 prefix on ICs indicates a broader operating temperature range, generally intended for military use. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 37. |
TTL stands for transistor-technology-logic. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 38. |
When decisions demand two possible actions, the IF/THEN/ELSE control structure is used. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 39. |
The input at the 1, 2, 4, 8 inputs to a 4-line to 16-line decoder with active- low outputs is 1110. As a result, output line 7 is driven LOW. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 40. |
To implement the full-adder sum functions, two exclusive-OR gates can be used. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 41. |
A square in the top row of a K-map is considered to be adjacent to its corresponding square in the bottom row. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 42. |
Truth tables are great for listing all possible combinations of independent variables. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 43. |
The carry output of each adder in a ripple adder provides an additional sum output bit. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» B. false | |
| 44. |
A good rule of thumb for determining the pin numbers of dual-in-line package IC chips would be to place the notch to your right and pin #1 will always be in the lower right corner. |
| A. | true |
| B. | false |
| C. | none of the above |
| D. | can not predict |
| Answer» C. none of the above | |
| 45. |
Occasionally, a particular logic expression will be of no consequence in the operation of a circuit, such as in a BCD-to-decimal converter. These result in terms in the K-map and can be treated as either                or , in order to the resulting term. |
| A. | don\t care, 1\s, 0\s, simplify |
| B. | spurious, and\s, or\s, eliminate |
| C. | duplicate, 1\s, 0\s, verify |
| D. | spurious, 1\s, 0\s, simplify |
| Answer» B. spurious, and\s, or\s, eliminate | |
| 46. |
The circuit produces a HIGH output whenever the two inputs are unequal. |
| A. | exclusive-and |
| B. | exclusive- nor |
| C. | exclusive-or |
| D. | inexclusive -or |
| Answer» D. inexclusive -or | |
| 47. |
When grouping cells within a K-map, the cells must be combined in groups of . |
| A. | 2\s |
| B. | 1, 2, 4, 8, etc. |
| C. | 4\s |
| D. | 3\s |
| Answer» C. 4\s | |
| 48. |
In VHDL, data can be each of the following types except . |
| A. | bit |
| B. | bit_vector |
| C. | std_logic |
| D. | std_vect or |
| Answer» E. | |
| 49. |
The statement evaluates the variable status. |
| A. | if/then |
| B. | if/then/el se |
| C. | case |
| D. | elsif |
| Answer» B. if/then/el se | |
| 50. |
A 4-bit adder has the following inputs: C0 = 0, A1 = 0, A2 = 1, A3 = 0, A4 = 1, B1 = 0, B2 = 1, B3 = 1, B4 = 1. The output will be . |
| A. | 1100 |
| B. | 10101 |
| C. | 11000 |
| D. | 11 |
| Answer» D. 11 | |