MCQOPTIONS
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MCQOPTIONS
This section includes 7 Mcqs, each offering curated multiple-choice questions to sharpen your Vhdl knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Two decade counters cascaded together will divide the input frequency by ________ |
| A. | 10 |
| B. | 100 |
| C. | 1000 |
| D. | 10000 |
| Answer» C. 1000 | |
| 2. |
The number of flip-flops used in a counter is _________ number of states in the counter. |
| A. | Greater than |
| B. | Less than |
| C. | Equal to |
| D. | Greater than equal to |
| Answer» E. | |
| 3. |
Asynchronous counters are generally used in circuits with higher frequency, where a large number of bits are involved. |
| A. | True |
| B. | False |
| Answer» C. | |
| 4. |
Synchronous counter use ________ global clock, unlike asynchronous counter. |
| A. | One |
| B. | Two |
| C. | Three |
| D. | zero |
| Answer» B. Two | |
| 5. |
In __________ counter universal clock is not used. |
| A. | Synchronous counter |
| B. | Asynchronous counter |
| C. | Decade counter |
| D. | Ring counter |
| Answer» C. Decade counter | |
| 6. |
‘shift_reg’ is used to initialize the _____________ in the shift register. |
| A. | LSB |
| B. | MSB |
| C. | Register type |
| D. | Register bits |
| Answer» C. Register type | |
| 7. |
The ring counter is a serial shift register with feedback from the output of the last flip-flop to the input of the first flip-flop. |
| A. | True |
| B. | False |
| Answer» B. False | |