The difference between DRAM’s and SDRAM’s is/are

the dram’s will not use the master slave relationship in data transfer

the sdram’s make use of clock

the sdram’s are more power efficient

950 + Mcqs in Computer Architecture in Computer Science Engineering (CSE) Page 1 McqOptions

1.	The bit is used to indicate the validity of the page.
A.	valid bit
B.	invalid bit
C.	correct bit
D.	none of the mentioned
Answer» B. invalid bit

Discussion

2.	BUS arbitration approach uses the involvement of the processor.
A.	centralised arbitration
B.	distributed arbitration
C.	random arbitration
D.	all of the mentioned
Answer» B. distributed arbitration

Discussion

3.	The read and write operations usually start at of the sector.
A.	center
B.	middle
C.	from the last used point
D.	boundaries
Answer» E.

Discussion

4.	The cache bridges the speed gap between and
A.	ram and rom
B.	ram and secondary memory
C.	processor and ram
D.	none of the mentioned
Answer» D. none of the mentioned

Discussion

5.	The multiplier is stored in
A.	PC Register
B.	Shift Register
C.	Cache
D.	None of the above
Answer» C. Cache

Discussion

6.	In LRU, the referenced blocks counter is set to’0′ and that of the previous blocks are incremented by one and others remain same, in the case of
A.	hit
B.	miss
C.	delay
D.	none of the mentioned
Answer» B. miss

Discussion

7.	In a 4M-bit chip organisation has a total of 19 external connections.then it has address if 8 data lines are there.
A.	10
B.	8
C.	9
D.	12
Answer» D. 12

Discussion

8.	In the output interface of the parallel port, along with the valid signal is also sent.
A.	data
B.	idle signal
C.	interrupt
D.	acknowledge signal
Answer» C. interrupt

Discussion

9.	The is used to coordinate the operation of the multiplier.
A.	controller
B.	coordinator
C.	control sequencer
D.	none of the mentioned
Answer» D. none of the mentioned

Discussion

10.	The only difference between the EEPROM and flash memory is that the latter doesn’t allow bulk data to be written.
A.	true
B.	false
Answer» B. false

Discussion

11.	If hit rates are well below 0.9, then they’re called as speedy computers.
A.	true
B.	false
Answer» C.

Discussion

12.	The original design of the RAMBUS required for data lines.
A.	4
B.	6
C.	8
D.	9
Answer» E.

Discussion

13.	instruction is used to set up a frame pointer for the subroutines in 68000.
A.	create
B.	link
C.	unlk
D.	frame
Answer» C. unlk

Discussion

14.	interrupt method uses register whose bits are set separately by interrupt signal for each device.
A.	parallel priority interrupt
B.	serial priority interrupt
C.	daisy chaining
D.	none of the mentioned
Answer» B. serial priority interrupt

Discussion

15.	The process divides the disk into sectors and tracks.
A.	creation
B.	initiation
C.	formatting
D.	modification
Answer» D. modification

Discussion

16.	The PCI BUS supports address space/s.
A.	i/o
B.	memory
C.	configuration
D.	all of the mentioned
Answer» E.

Discussion

17.	The difference between DRAM’s and SDRAM’s is/are
A.	the dram’s will not use the master slave relationship in data transfer
B.	the sdram’s make use of clock
C.	the sdram’s are more power efficient
D.	none of the mentioned
Answer» E.

Discussion

18.	is the bottleneck, when it comes computer performance.
A.	memory access time
B.	memory cycle time
C.	delay
D.	latency
Answer» C. delay

Discussion

19.	is generally used to increase the apparent size of physical memory.
A.	secondary memory
B.	virtual memory
C.	hard-disk
D.	disks
Answer» C. hard-disk

Discussion

20.	The appropriate return addresses are obtained with the help of in case of nested routines.
A.	mar
B.	mdr
C.	buffers
D.	stack-pointers
Answer» E.

Discussion

21.	signal is asserted when the initiator wishes to send a message to the target.
A.	msg
B.	app
C.	sms
D.	atn
Answer» E.

Discussion

22.	The ARM processors don’t support Byte addressability.
A.	true
B.	false
Answer» C.

Discussion

23.	In protocol the information is directly written into the main memory.
A.	write through
B.	write back
C.	write first
D.	none of the mentioned
Answer» B. write back

Discussion

24.	Which parameter of computer determines its power to do various operations on data items
A.	Instruction set
B.	Memory size
C.	Assembly language
D.	Application language
Answer» B. Memory size

Discussion

25.	In the client server model of the cluster approach is used.
A.	load configuration
B.	fifo
C.	bankers algorithm
D.	round robin
Answer» E.

Discussion

26.	The controller uses to help with the transfers when handling network interfaces.
A.	input buffer storage
B.	signal enhancers
C.	bridge circuits
D.	all of the mentioned
Answer» B. signal enhancers

Discussion

27.	A is used to restore the contents of the cells.
A.	sense amplifier
B.	refresh counter
C.	restorer
D.	none of the mentioned
Answer» C. restorer

Discussion

28.	The Reason for the disregarding of the SRAM’s is
A.	low efficiency
B.	high power consumption
C.	high cost
D.	all of the mentioned
Answer» D. all of the mentioned

Discussion

29.	To get the row address of the required data is enabled.
A.	cas
B.	ras
C.	cs
D.	sense/write
Answer» C. cs

Discussion

30.	register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt.
A.	mass
B.	mark
C.	make
D.	mask
Answer» E.

Discussion

31.	Which method of representation has two representations for ‘0’?
A.	sign-magnitude
B.	1’s complement
C.	2’s complement
D.	none of the mentioned
Answer» B. 1’s complement

Discussion

32.	The algorithm followed in most of the systems to perform out of order execution is ______
A.	Tomasulo algorithm
B.	Score carding
C.	Reader-writer algorithm
D.	None of the mentioned
Answer» B. Score carding

Discussion

33.	DDR SDRAM’s perform faster data transfer by
A.	integrating the hardware
B.	transferring on both edges
C.	improving the clock speeds
D.	increasing the bandwidth
Answer» C. improving the clock speeds

Discussion

34.	The PCI BUS has interrupt request lines.
A.	6
B.	1
C.	4
D.	3
Answer» D. 3

Discussion

35.	The virtual memory bridges the size and speed gap between and
A.	ram and rom
B.	ram and secondary memory
C.	processor and ram
D.	none of the mentioned
Answer» C. processor and ram

Discussion

36.	The devices connected to USB is assigned a address.
A.	9 bit
B.	16 bit
C.	4 bit
D.	7 bit
Answer» E.

Discussion

37.	The plays a very vital role in case of super scalar processors.
A.	compilers
B.	motherboard
C.	memory
D.	peripherals
Answer» B. motherboard

Discussion

38.	converts the programs written in assembly language into machine instructions.
A.	machine compiler
B.	interpreter
C.	assembler
D.	converter
Answer» D. converter

Discussion

39.	The sampling process in speaker output is a process.
A.	asynchronous
B.	synchronous
C.	isochronous
D.	none of the mentioned
Answer» D. none of the mentioned

Discussion

40.	When we perform subtraction on -7 and 1 the answer in 2’s complement form is
A.	1010
B.	1110
C.	0110
D.	1000
Answer» E.

Discussion

41.	The method which offers higher speeds of I/O transfers is ___________
A.	Interrupts
B.	Memory mapping
C.	Program-controlled I/O
D.	DMA
Answer» E.

Discussion

42.	signal is sent by the initiator to indicate the duration of the transaction.
A.	frame#
B.	irdy#
C.	tmy#
D.	seld#
Answer» B. irdy#

Discussion

43.	The circuit enables the generation of the ASCII code when the key is pressed.
A.	generator
B.	debouncing
C.	encoder
D.	logger
Answer» D. logger

Discussion

44.	register Connected to the Processor bus is a single-way transfer capable.
A.	pc
B.	ir
C.	temp
D.	z
Answer» E.

Discussion

45.	The register in 68000 can contain up to bits.
A.	24
B.	32
C.	16
D.	64
Answer» C. 16

Discussion

46.	__________is used to implement virtual memory organization.
A.	Page table
B.	Frame table
C.	MMU
D.	None of the mentioned
Answer» D. None of the mentioned

Discussion

47.	directive is used to specify and assign the memory required for the block of code.
A.	allocate
B.	assign
C.	set
D.	reserve
Answer» E.

Discussion

48.	is used to store data in registers.
A.	d flip flop
B.	jk flip flop
C.	rs flip flop
D.	none of the mentioned
Answer» B. jk flip flop

Discussion

49.	In technology, the implementation of the register file is by using an array of memory locations.
A.	vlsi
B.	ansi
C.	isa
D.	asci
Answer» B. ansi

Discussion

50.	The Bit extension of the register is denoted with the help of symbol.
A.	$
B.	`
C.	e
D.	~
Answer» D. ~

Discussion

Explore topic-wise MCQs in Computer Science Engineering (CSE).

The bit is used to indicate the validity of the page.

BUS arbitration approach uses the involvement of the processor.

The read and write operations usually start at of the sector.

The cache bridges the speed gap between and

The multiplier is stored in

In LRU, the referenced blocks counter is set to’0′ and that of the previous blocks are incremented by one and others remain same, in the case of

In a 4M-bit chip organisation has a total of 19 external connections.then it has address if 8 data lines are there.

In the output interface of the parallel port, along with the valid signal is also sent.

The is used to coordinate the operation of the multiplier.

The only difference between the EEPROM and flash memory is that the latter doesn’t allow bulk data to be written.

If hit rates are well below 0.9, then they’re called as speedy computers.

The original design of the RAMBUS required for data lines.

instruction is used to set up a frame pointer for the subroutines in 68000.

interrupt method uses register whose bits are set separately by interrupt signal for each device.

The process divides the disk into sectors and tracks.

The PCI BUS supports address space/s.

The difference between DRAM’s and SDRAM’s is/are

is the bottleneck, when it comes computer performance.

is generally used to increase the apparent size of physical memory.

The appropriate return addresses are obtained with the help of in case of nested routines.

signal is asserted when the initiator wishes to send a message to the target.

The ARM processors don’t support Byte addressability.

In protocol the information is directly written into the main memory.

Which parameter of computer determines its power to do various operations on data items

In the client server model of the cluster approach is used.

The controller uses to help with the transfers when handling network interfaces.

A is used to restore the contents of the cells.

The Reason for the disregarding of the SRAM’s is

To get the row address of the required data is enabled.

register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt.

Which method of representation has two representations for ‘0’?

The algorithm followed in most of the systems to perform out of order execution is ______

DDR SDRAM’s perform faster data transfer by

The PCI BUS has interrupt request lines.

The virtual memory bridges the size and speed gap between and

The devices connected to USB is assigned a address.

The plays a very vital role in case of super scalar processors.

converts the programs written in assembly language into machine instructions.

The sampling process in speaker output is a process.

When we perform subtraction on -7 and 1 the answer in 2’s complement form is

The method which offers higher speeds of I/O transfers is ___________

signal is sent by the initiator to indicate the duration of the transaction.

The circuit enables the generation of the ASCII code when the key is pressed.

register Connected to the Processor bus is a single-way transfer capable.

The register in 68000 can contain up to bits.

__________is used to implement virtual memory organization.

directive is used to specify and assign the memory required for the block of code.

is used to store data in registers.

In technology, the implementation of the register file is by using an array of memory locations.

The Bit extension of the register is denoted with the help of symbol.