MCQOPTIONS
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MCQOPTIONS
This section includes 950 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Science Engineering (CSE) knowledge and support exam preparation. Choose a topic below to get started.
| 101. |
When the page table is placed in the main memory, the is used to store the recently accessed pages. |
| A. | mmu |
| B. | tlb |
| C. | r0 |
| D. | table |
| Answer» C. r0 | |
| 102. |
Every time a new instruction is loaded into IR the output of is loaded into UPC. |
| A. | starting address generator |
| B. | loader |
| C. | linker |
| D. | clock |
| Answer» B. loader | |
| 103. |
The addresses generated by the 68000 is bit. |
| A. | 32 |
| B. | 16 |
| C. | 24 |
| D. | 42 |
| Answer» D. 42 | |
| 104. |
In associative mapping, in a 16 bit system the tag field has bits. |
| A. | 12 |
| B. | 8 |
| C. | 9 |
| D. | 10 |
| Answer» B. 8 | |
| 105. |
In associative mapping during LRU, the counter of the new block is set to ‘0’ and all the others are incremented by one when occurs. |
| A. | delay |
| B. | miss |
| C. | hit |
| D. | delayed hit |
| Answer» C. hit | |
| 106. |
In a system, which has 32 registers the register id is long. |
| A. | 16 bit |
| B. | 8 bits |
| C. | 5 bits |
| D. | 6 bits |
| Answer» D. 6 bits | |
| 107. |
instruction is used to get the 1’s complement of the operand. |
| A. | comp |
| B. | bic |
| C. | ~cmp |
| D. | mvn |
| Answer» E. | |
| 108. |
The controller multiplexes the addresses after getting the signal. |
| A. | intr |
| B. | ack |
| C. | reset |
| D. | request |
| Answer» E. | |
| 109. |
The SRAM’s are basically used as |
| A. | registers |
| B. | caches |
| C. | tlb |
| D. | buffer |
| Answer» C. tlb | |
| 110. |
The small extremely fast, RAM’s all called as |
| A. | cache |
| B. | heaps |
| C. | accumulators |
| D. | stacks |
| Answer» C. accumulators | |
| 111. |
is used to detect and correct the errors that may occur during data transfers. |
| A. | ecc |
| B. | crc |
| C. | checksum |
| D. | none of the mentioned |
| Answer» B. crc | |
| 112. |
directive is used to name the register used for execution of an instruction. |
| A. | assign |
| B. | rn |
| C. | name |
| D. | declare |
| Answer» C. name | |
| 113. |
are used to overcome the difference in data transfer speeds of various devices. |
| A. | speed enhancing circuitory |
| B. | bridge circuits |
| C. | multiple buses |
| D. | buffer registers |
| Answer» E. | |
| 114. |
The is the BUS used in Macintosh PC’s. |
| A. | nubus |
| B. | eisa |
| C. | pci |
| D. | none of the mentioned |
| Answer» B. eisa | |
| 115. |
The 68000 uses address assignment. |
| A. | big endian |
| B. | little endian |
| C. | x-little endian |
| D. | x-big endian |
| Answer» B. little endian | |
| 116. |
is used as an intermediate to extend the processor BUS. |
| A. | bridge |
| B. | router |
| C. | connector |
| D. | gateway |
| Answer» B. router | |
| 117. |
The device connected to the BUS are given addresses of bit. |
| A. | 24 |
| B. | 64 |
| C. | 32 |
| D. | 16 |
| Answer» C. 32 | |
| 118. |
method is used in centralized systems to perform out of order execution. |
| A. | scorecard |
| B. | score boarding |
| C. | optimizing |
| D. | redundancy |
| Answer» C. optimizing | |
| 119. |
Whenever a request to the page that is not present in the main memory is accessed is triggered. |
| A. | interrupt |
| B. | request |
| C. | page fault |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 120. |
In IBM’s S360/370 systems lines are used to select the I/O devices. |
| A. | scan in and out |
| B. | connect |
| C. | search |
| D. | peripheral |
| Answer» B. connect | |
| 121. |
translates the logical address into a physical address. |
| A. | mmu |
| B. | translator |
| C. | compiler |
| D. | linker |
| Answer» B. translator | |
| 122. |
In a 32 bit processor, the A0 bit of the address line is connected to of the parallel port interface. |
| A. | valid bit |
| B. | idle bit |
| C. | interrupt enable bit |
| D. | status or data register |
| Answer» E. | |
| 123. |
The 4 bit PID’s are transmitted twice. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 124. |
The air pressure can be countered by putting in the head-disc surface arrangement. |
| A. | air filter |
| B. | spring mechanism |
| C. | coolant |
| D. | none of the mentioned |
| Answer» C. coolant | |
| 125. |
are the different type/s of generating control signals. |
| A. | micro-programmed |
| B. | hardwired |
| C. | micro-instruction |
| D. | both micro-programmed and hardwired |
| Answer» E. | |
| 126. |
directives are used to initialize operands. |
| A. | int |
| B. | dataword |
| C. | reserve |
| D. | dcd |
| Answer» E. | |
| 127. |
The format is usually used to store data. |
| A. | bcd |
| B. | decimal |
| C. | hexadecimal |
| D. | octal |
| Answer» B. decimal | |
| 128. |
The signal is used to indicate the beginning of a new frame. |
| A. | start |
| B. | sof |
| C. | beg |
| D. | none of the mentioned |
| Answer» C. beg | |
| 129. |
The instruction, Add #45, R1 does _______ |
| A. | Adds the value of 45 to the address of R1 and stores 45 in that address |
| B. | Adds 45 to the value of R1 and stores it in R1 |
| C. | Finds the memory location 45 and adds that content to that of R1 |
| D. | None of the mentioned |
| Answer» C. Finds the memory location 45 and adds that content to that of R1 | |
| 130. |
signal enables the processor to wait for the memory operation to complete. |
| A. | mfc |
| B. | tlb |
| C. | wmfc |
| D. | alb |
| Answer» D. alb | |
| 131. |
While using the iterative construct (Branching) in execution instruction is used to check the condition. |
| A. | testandset |
| B. | branch |
| C. | testcondn |
| D. | none of the mentioned |
| Answer» C. testcondn | |
| 132. |
The Sun micro systems processors usually follow architecture. |
| A. | cisc |
| B. | isa |
| C. | ultra sparc |
| D. | risc |
| Answer» E. | |
| 133. |
Which methods of representation of numbers occupies large amount of memory than others? |
| A. | sign-magnitude |
| B. | 1’s compliment |
| C. | 2’s compliment |
| D. | Both a and b |
| Answer» B. 1’s compliment | |
| 134. |
A control bit called has to be provided to each block in set- associative. |
| A. | idol bit |
| B. | valid bit |
| C. | reference bit |
| D. | all of the mentioned |
| Answer» C. reference bit | |
| 135. |
have been developed specifically for pipelined systems. |
| A. | utility software |
| B. | speed up utilities |
| C. | optimizing compilers |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 136. |
Each stage in pipelining should be completed within cycle. |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» B. 2 | |
| 137. |
The master is also called as in PCI terminology. |
| A. | initiator |
| B. | commander |
| C. | chief |
| D. | starter |
| Answer» B. commander | |
| 138. |
signal is used to show complete of memory operation. |
| A. | mfc |
| B. | wmfc |
| C. | cfc |
| D. | none of the mentioned |
| Answer» B. wmfc | |
| 139. |
The 68000 uses method to access I/O devices buffers. |
| A. | memory mapped |
| B. | i/o mapped |
| C. | buffer mapped |
| D. | none of the mentioned |
| Answer» B. i/o mapped | |
| 140. |
After the device completes its operation assumes the control of the BUS. |
| A. | another device |
| B. | processor |
| C. | controller |
| D. | none of the mentioned |
| Answer» C. controller | |
| 141. |
The advantage of CMOS SRAM over the transistor one’s is |
| A. | low cost |
| B. | high efficiency |
| C. | high durability |
| D. | low power consumption |
| Answer» E. | |
| 142. |
method is used to map logical addresses of variable length onto physical memory. |
| A. | paging |
| B. | overlays |
| C. | segmentation |
| D. | paging with segmentation |
| Answer» D. paging with segmentation | |
| 143. |
The PCI follows a set of standards primarily used in PC’s. |
| A. | intel |
| B. | motorola |
| C. | ibm |
| D. | sun |
| Answer» D. sun | |
| 144. |
In which cycle the memory is read and the contents of memory at the address containedin the PC register are loaded into in to IR. |
| A. | Execution Cycle |
| B. | Memory Cycle |
| C. | Fetch Cycle |
| D. | Decode Cycle |
| Answer» D. Decode Cycle | |
| 145. |
address space gives the PCI its plug and plays capability. |
| A. | configuration |
| B. | i/o |
| C. | memory |
| D. | all of the mentioned |
| Answer» B. i/o | |
| 146. |
instruction is used to check the bit of the condition flags. |
| A. | test |
| B. | tb |
| C. | check |
| D. | bt |
| Answer» E. | |
| 147. |
directive is used to indicate the beginning of the program instruction or data. |
| A. | equ |
| B. | start |
| C. | area |
| D. | space |
| Answer» D. space | |
| 148. |
The ALU makes use of to store the intermediate results. |
| A. | accumulators |
| B. | registers |
| C. | heap |
| D. | stack |
| Answer» B. registers | |
| 149. |
method is used to establish priority by serially connecting all devices that request an interrupt. |
| A. | vectored-interrupting |
| B. | daisy chain |
| C. | priority |
| D. | polling |
| Answer» C. priority | |
| 150. |
BR… |
| A. | true |
| B. | false |
| Answer» B. false | |