MCQOPTIONS
Saved Bookmarks
This section includes 21 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
A sixteen-input multiplexer will need three data select input control lines. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 2. |
A multiplexer is a device that chooses which output to send an input to by means of select lines. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 3. |
Parity checking can only detect an odd number of errors. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 4. |
A hexadecimal decoder selects one of sixteen outputs depending on the 8-bit binary input applied. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 5. |
A decoder with two inputs will have two outputs for the decoded value. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 6. |
A code in which each individual digit of a decimal number is represented by a 4-bit binary number is _________. |
| A. | binary coded decimal |
| B. | binary |
| C. | hexadecimal |
| D. | seven-segment code |
| Answer» B. binary | |
| 7. |
Which digital system translates coded characters into a more intelligible form? |
| A. | encoder |
| B. | display |
| C. | counter |
| D. | decoder |
| Answer» E. | |
| 8. |
Which type of decoder will select one of sixteen outputs, depending on the 4-bit binary input value? |
| A. | hexadecimal |
| B. | dual octal outputs |
| C. | binary-to-hexadecimal |
| D. | hexadecimal-to-binary |
| Answer» B. dual octal outputs | |
| 9. |
An AND gate and two INVERTERs can be connected to act as a basic decoder. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 10. |
A device that uses a binary decoder to direct a digital signal from a single source to one of several destinations is a ________. |
| A. | multiplexer |
| B. | demultiplexer |
| C. | encoder |
| D. | comparator |
| Answer» C. encoder | |
| 11. |
The general function of a decoder is to activate one or more circuit outputs upon detection of a particular digital state. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 12. |
An encoder circuit is designed to generate specific codes. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 13. |
Parity systems are defined as either_____ or _____ and will add an extra _____ to the digital information being transmitted. |
| A. | positive, negative, byte |
| B. | odd, even, bit |
| C. | upper, lower, digit |
| D. | on, off, decimal |
| Answer» C. upper, lower, digit | |
| 14. |
A magnitude comparator outputs the highest or lowest value of its inputs depending on control signals. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 15. |
A magnitude comparator determines: |
| A. | A B and if A B or A >> B |
| B. | A B and if A > B or A < b |
| C. | A = B and if A > B or A < b |
| D. | A B and if A < b or a > B |
| Answer» D. A B and if A < b or a > B | |
| 16. |
The diodes in a seven-segment display where all cathodes are tied together and grounded are illuminated when a logic ____________________ is applied to the ____________________. |
| A. | LOW, anodes |
| B. | LOW, count down control line |
| C. | HIGH, anode |
| D. | HIGH, count up control line |
| Answer» D. HIGH, count up control line | |
| 17. |
Select one of the following statements that best describes the parity method of error detection: |
| A. | Parity checking is best suited for detecting single-bit errors in transmitted codes. |
| B. | Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. |
| C. | Parity checking is not suitable for detecting single-bit errors in transmitted codes. |
| D. | Parity checking is capable of detecting and correcting errors in transmitted codes. |
| Answer» B. Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. | |
| 18. |
A technique that can be used in multiple-digit numerical displays to control suppression or display of leading or trailing zeros in the display is called _________. |
| A. | advanced zero control |
| B. | time division multiplexing |
| C. | parity generation |
| D. | ripple blanking |
| Answer» E. | |
| 19. |
A multiplexed display: |
| A. | accepts data inputs from one line and passes this data to multiple output lines |
| B. | uses one display to present two or more pieces of information |
| C. | accepts data inputs from multiple lines and passes this data to multiple output lines |
| D. | accepts data inputs from several lines and multiplexes this input data to four BCD lines |
| Answer» C. accepts data inputs from multiple lines and passes this data to multiple output lines | |
| 20. |
A multiplexer is a device that outputs a fixed sequence of binary states on each clock pulse. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» C. 1 | |
| 21. |
Most demultiplexers facilitate which of the following? |
| A. | decimal to hexadecimal |
| B. | single input, multiple outputs |
| C. | ac to dc |
| D. | odd parity to even parity |
| Answer» C. ac to dc | |