Explore topic-wise MCQs in Vhdl.

This section includes 8 Mcqs, each offering curated multiple-choice questions to sharpen your Vhdl knowledge and support exam preparation. Choose a topic below to get started.

1.

Which of the following input on a flip-flop has control over the outputs?

A. Data input
B. Clock
C. Enable
D. Preset
Answer» E.
Discussion
2.

What happens if both the inputs PRE and CLR are activated?

A. Flip-flop is reset
B. Flip-flop is set
C. Invalid State
D. No output
Answer» D. No output
Discussion
3.

What is the state of CLEAR input?

A. Reset
B. Set
C. Invalid
D. Don t care
Answer» B. Set
Discussion
4.

What is the state of PRESET input?

A. Reset
B. Set
C. Invalid
D. Don t care
Answer» C. Invalid
Discussion
5.

The output of the flip-flop _______ when both the input, preset and clear are active low at the same time.

A. Is set to 1
B. Is set to 0
C. Becomes X (Don t care)
D. Is controlled by clock
Answer» D. Is controlled by clock
Discussion
6.

Asynchronous inputs are also called override inputs.

A. True
B. False
Answer» B. False
Discussion
7.

Clear (CLR) or preset (PRE) with a bar above them shows that they have ________

A. Active high input
B. Active low input
C. Clocked input
D. No input
Answer» C. Clocked input
Discussion
8.

What type of inputs is preset and clear?

A. Data input
B. Output
C. Clock input
D. Control input
Answer» E.
Discussion