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This section includes 209 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessor knowledge and support exam preparation. Choose a topic below to get started.
| 201. |
Among the following the slowest ADC is |
| A. | Parallel-comparator (flash type) |
| B. | Successive Approximation type |
| C. | Integrating type |
| D. | Counting type |
| Answer» D. Counting type | |
| 202. |
The number of comparator carried out in a 4 bit flashtype A/D converter is |
| A. | 16 |
| B. | 15 |
| C. | 4 |
| D. | 14 |
| Answer» C. 4 | |
| 203. |
A 10 bit A/D convertor is used to digitize an analog signal in the 0 to 5 V range. The maximum peak to peak ripple voltage that can be allowed in the d.c. supply voltage is |
| A. | nearly 100 mV |
| B. | nearly 50 mV |
| C. | nearly 25 mV |
| D. | nearly 5 mV |
| Answer» E. | |
| 204. |
Which of the following is D to A conversion technique? |
| A. | Successive approximation |
| B. | Weighted resistor technique |
| C. | Dual slope technique |
| D. | Single slope technique |
| Answer» C. Dual slope technique | |
| 205. |
A microprocessor with a 16 bit address bus is used in a linear memory selection configuration (i.e., Address bus lines are directly used as chip select of memory chips) with 4 memory chips. The minimum addressable memory space is |
| A. | 64 K |
| B. | 16 K |
| C. | 8 K |
| D. | 4 K |
| Answer» B. 16 K | |
| 206. |
Hamming codes are used for error detection and correction. If the minimum hamming distance is m, then the number of errors correctable is |
| A. | equal to m |
| B. | less than m/2 |
| C. | equal to 2m |
| D. | greater than m |
| Answer» C. equal to 2m | |
| 207. |
The multiplexing of address and data buses is employed in microprocessor to |
| A. | save time |
| B. | reduce cost |
| C. | reduce the number of pins in IC chip |
| D. | improve its reliability |
| Answer» B. reduce cost | |
| 208. |
The DTL, TTL, ECL and CMOS families of digital ICs are compared in the following 4 columns |
| A. | P |
| B. | R |
| C. | Q |
| D. | S |
| Answer» C. Q | |
| 209. |
A 4 bit ripple counter and a 4 bit synchronous counter are made using flip-flop having a propagation delay of 10 ns each. If the worst delay in the ripple counter and the synchronous counter be R and S respectively, then |
| A. | R = 10 ns, S = 40 ns |
| B. | R = 40 ns, S = 10 ns |
| C. | R = 10 ns, S = 30 ns |
| D. | R = 30 ns, S = 10 ns |
| Answer» C. R = 10 ns, S = 30 ns | |