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This section includes 133 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessor knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The following program is written for an 8085 microprocessor to add two bytes located at memory addresses 1FFE and 1FFF LXI H 1FFEMOVB, MINRLMOVA, MADDBINRLMOVM, AXORAOn completion of the execution of the program, the result of addition is found |
| A. | In the register A |
| B. | At the memory address 1000 |
| C. | At the memory address 1F00 |
| D. | At the memory address 2000 |
| Answer» D. At the memory address 2000 | |
| 2. |
Which pins of 8086 in maximum mode are used for the control of status signals S2, S1 So? |
| A. | 28, 27 and 26 |
| B. | 1, 2 and 3 |
| C. | 31, 32 and 33 |
| D. | 34, 35 and 36 |
| Answer» E. | |
| 3. |
If Register B contains 28 H, and Accumulator 97 H. What will be the content of Register C after the following program has been executed?MOV A, B MOVC, A MOV B, C MOV C, B |
| A. | 28 H |
| B. | AA H |
| C. | 97 H |
| D. | OO H |
| Answer» B. AA H | |
| 4. |
What is the total delay for executing the following program?MVI C, FFH DCRC JNZ LOOP |
| A. | 1.8 ms |
| B. | 1.5 ms |
| C. | 2.0 ms |
| D. | 2.5 ms |
| Answer» B. 1.5 ms | |
| 5. |
Microprocessor is an in-sequence device, which powerful category of instructions breaks this sequence? |
| A. | Data transfer Inst |
| B. | Arithmetic Inst |
| C. | Logical Inst |
| D. | Branch control Inst |
| Answer» E. | |
| 6. |
Specify the number of times the given loop will count LOOP:MVI B, 64 H DCRB JNZ LOOP |
| A. | 101 |
| B. | 100 |
| C. | 65 |
| D. | Infinite |
| Answer» E. | |
| 7. |
Assume that memory location 2075 H has a data byte 47 H. Specify the contents of the address bus A15 A8 and the MUXD bus AD7 ADO when the MPU asserts the RD signal |
| A. | 2075 H and 47 H |
| B. | 20 H and 47 H |
| C. | 47 H and 2075 H |
| D. | 75 H and 47 H |
| Answer» C. 47 H and 2075 H | |
| 8. |
Specify the output at PORT1, after the following program has been executed MVI B, 82 H MOVA, B MOV C, A MVI D, 37 H DUT PORT 1HLT |
| A. | 82 H |
| B. | OO H |
| C. | 37 H |
| D. | FF H |
| Answer» B. OO H | |
| 9. |
Specify the contents of register A after the execution of following program MVI A, F8 H SUI69 HHLT |
| A. | F8 H |
| B. | 8F H |
| C. | 69 H |
| D. | 96 H |
| Answer» C. 69 H | |
| 10. |
Specify the flag status (CY, S, Z) after the instruction DRA is executed. MVI A, A9 H MVIB, 57 HADDBORAA |
| A. | 1, 1, 1 |
| B. | 0, 1, 10 |
| C. | 1, 0, 1 |
| D. | 1, 1, 0 |
| Answer» B. 0, 1, 10 | |
| 11. |
What will be the O/P, if the following program is executed? MVI A, OO H DCRAOUT PORT 1 HLT |
| A. | OOH |
| B. | FF H |
| C. | OOH with CY = 1 |
| D. | Error |
| Answer» C. OOH with CY = 1 | |
| 12. |
LOOP : MVI B, 64 H NOPDCRBINZLOOP |
| A. | 100 |
| B. | Infinitely |
| C. | 101 |
| D. | 0 |
| Answer» C. 101 | |
| 13. |
How many times the following loop will be executed? LXI B, 0007 H DCXBMOVA, BORACJNZLOOP |
| A. | 7 times |
| B. | Can't say |
| C. | 8 times |
| D. | Infinitely |
| Answer» B. Can't say | |
| 14. |
Bit D7 of the control register in 8255 specifies |
| A. | I/O bus |
| B. | BSR bus |
| C. | Both (A) and (B) |
| D. | None of these |
| Answer» D. None of these | |
| 15. |
Specify the bit of the CW for 8255, which differentiates between the I/O mode and the BSR mode? |
| A. | D |
| B. | D |
| C. | D |
| D. | |
| E. | D |
| Answer» B. D | |
| 16. |
What will be BSR control word if PC7 is to be set to 1? |
| A. | OF H |
| B. | OE H |
| C. | 07 H |
| D. | 06 H |
| Answer» B. OE H | |
| 17. |
Which bit in the CW is used to specify the level triggered or edge triggered mode in 8259 A? |
| A. | D |
| B. | D |
| C. | D |
| D. | D |
| Answer» D. D | |
| 18. |
A stack pointer is |
| A. | A 16-bit register in the |
| B. | P that indicates the begining of the stack memory |
| C. | A register that decodes and executes 16-bit instruction |
| D. | The first memory location where a sub-routine address is stored |
| E. | A register in which flag bits are stored. |
| Answer» B. P that indicates the begining of the stack memory | |
| 19. |
A stack is |
| A. | An 8 bit register in the |
| B. | P |
| C. | An 16 bit register in the |
| D. | A set of memory locations is R/W memory reserved for storing information |
| E. | A 16 bit memory address stored in the PC |
| Answer» D. A set of memory locations is R/W memory reserved for storing information | |
| 20. |
The data bus in microprocessor-based systems is used for data transfer |
| A. | Between the microprocessor and I/O devices |
| B. | Between the microprocessor and memory |
| C. | Between I/O devices and memory |
| D. | For all the above |
| Answer» C. Between I/O devices and memory | |
| 21. |
In a microprocessor-based system, the stack is used to store |
| A. | Program |
| B. | Data |
| C. | Contents of PC and registers |
| D. | None of these |
| Answer» E. | |
| 22. |
A microprocessor performs the same function as |
| A. | Memory of a computer |
| B. | CPU of a computer |
| C. | Input device of a computer |
| D. | Output device of a computer |
| Answer» C. Input device of a computer | |
| 23. |
In an 8085 microprocessor-based system the maximum possible number input/output devices can be connected using I/O mapped I/O technique is given by |
| A. | 64 |
| B. | 56 |
| C. | 51 |
| D. | 65536 |
| Answer» C. 51 | |
| 24. |
An instruction which contains the data in its use |
| A. | Register addressing |
| B. | Immediate addressing |
| C. | Register indirect addressing |
| D. | Relative addressing |
| Answer» C. Register indirect addressing | |
| 25. |
Which of the following microprocessor is not an 8-bit microprocessor? |
| A. | 8085 |
| B. | 68000 |
| C. | Z-80 |
| D. | 6502 |
| Answer» D. 6502 | |
| 26. |
An 8-bit microprocessor signifies that it has |
| A. | An 8-bit address bus |
| B. | An 8-bit controller |
| C. | 8-bit interrupt lines |
| D. | An 8-bit data bus |
| Answer» E. | |
| 27. |
A memory system has a total of 8 memory chips, each with 12 address lines and 4 data lines. The total size of the memory system is |
| A. | 16 kbytes |
| B. | 48 kbytes |
| C. | 32 kbytes |
| D. | 64 kbytes |
| Answer» B. 48 kbytes | |
| 28. |
The multiplexing of address and data bus is employed in microprocessor to |
| A. | Save time |
| B. | Reduce cost |
| C. | Reduce the number of pins in IC chip |
| D. | Improve its reliability |
| Answer» B. Reduce cost | |
| 29. |
In an 8085 microprocessor, the I/O devices can be used in |
| A. | Memory mapped I/O only |
| B. | I/O mapped I/O only |
| C. | Memory-mapped or I/O mapped I/O |
| D. | None of the above |
| Answer» B. I/O mapped I/O only | |
| 30. |
A microprocessor consists of |
| A. | ALU |
| B. | Array of registers |
| C. | Control unit |
| D. | All of these |
| Answer» E. | |
| 31. |
A microcomputer consists of |
| A. | A microprocessor |
| B. | I/O devices |
| C. | Memory |
| D. | All of these |
| Answer» E. | |
| 32. |
Let the contents of the accumulator and register B be 00000100 and 01000000 respectively before execution of instruction SUB B, the contents of the accumulator after the execution of this instruction will be |
| A. | 00000100 |
| B. | 11000100 |
| C. | 01000000 |
| D. | 01001000 |
| Answer» C. 01000000 | |
| 33. |
In an 8085 microprocessor, MOV A, B instruction causes |
| A. | Copying of the contents of register B in register |
| B. | Transfer of the contents of register B to register A and the contents of register B becomes 00H |
| C. | Copying of the contents of register A in register B |
| D. | Transfer the contents of register A in register B and contents of register a becomes 00H |
| Answer» B. Transfer of the contents of register B to register A and the contents of register B becomes 00H | |
| 34. |
The following program is written for an 8085 microprocessor to add two bytes located at memory addresses 1FFE and 1FFF |
| A. | In the register A |
| B. | At the memory address 1000 |
| C. | At the memory address 1F00 |
| D. | At the memory address 2000 |
| Answer» D. At the memory address 2000 | |
| 35. |
The stack operates as |
| A. | FIFO |
| B. | LILO |
| C. | LIFO |
| D. | None of these |
| Answer» D. None of these | |
| 36. |
In an 8085 microprocessor-based system, the contents of SP are 1000H. PUSH B instruction will transfer the contents of registers B and C respectively for memory locations |
| A. | 0FFF H and 0FFE H |
| B. | 1000 H and 0FFF H |
| C. | 0FFE H and 0FFF H |
| D. | 1000 H and 1001 H |
| Answer» B. 1000 H and 0FFF H | |
| 37. |
Which of the following microprocessor has a 16-bit data bus? |
| A. | 8085 |
| B. | 8086 |
| C. | Z-80 |
| D. | 6502 |
| Answer» D. 6502 | |
| 38. |
In 8085 microprocessor, let the accumulator contains the value 0AH and register C contains the value 05H. After CMPC instruction is executed, the |
| A. | Zero and carry flags will be set |
| B. | Zero and carry flags will be reset |
| C. | Zero flag will be set and the carry flag will be reset |
| D. | Zero flag will be reset and the carry flag will be set |
| Answer» C. Zero flag will be set and the carry flag will be reset | |
| 39. |
In an 8085 microprocessor-based system, the contents of SP are 2000H. POPH instruction will transfer the contents of memory location |
| A. | 2001H and 2002H to H and L registers respectively |
| B. | 2001 H and 2000H to H and L registers respectively |
| C. | 2000H and 1FFFH to H and L registers respectively |
| D. | 2000H and 1999H to H and L registers respectively |
| Answer» B. 2001 H and 2000H to H and L registers respectively | |
| 40. |
In a microprocessor-based system, the stack is always in |
| A. | Microprocessor |
| B. | ROM |
| C. | RAM |
| D. | EPROM |
| Answer» D. EPROM | |
| 41. |
What is the main purpose for a wait state? |
| A. | To lengthen the bus cycle |
| B. | Depends on the I/O |
| C. | To shorten the bus cycle |
| D. | None of the above |
| Answer» B. Depends on the I/O | |
| 42. |
Which pin of 8086 is used for selection of 80 minimum and maximum mode? |
| A. | Pin no. 1 |
| B. | Pin no. 40 |
| C. | Pin no. 33 |
| D. | Pin no. 22 |
| Answer» D. Pin no. 22 | |
| 43. |
Which pins of 8086 in maximum mode are used for the control of status signals S |
| A. | 28, 27 and 26 |
| B. | 1, 2 and 3 |
| C. | 31, 32 and 33 |
| D. | 34, 35 and 36 |
| Answer» E. | |
| 44. |
2 s complement representation of a 16-bit number (one sign bit and 15 magnitude bits) is FFFI. Its magnitude in decimal representation is |
| A. | 0 |
| B. | 32767 |
| C. | 1 |
| D. | 65767 |
| Answer» C. 1 | |
| 45. |
What will be the 20 bit physical address, if the content of CS & IP are 124B H and 341C H respectively? |
| A. | 158 CC H |
| B. | 144 CC H |
| C. | 124 CC H |
| D. | 158 FC H |
| Answer» B. 144 CC H | |
| 46. |
Which of the following are functional parts of intel 8086? |
| A. | The execution unit |
| B. | The bus interface unit |
| C. | Both (A) and (B) |
| D. | None of these |
| Answer» D. None of these | |
| 47. |
What does the execution unit of Intel 8086 contain? |
| A. | General Purpose Registers |
| B. | Flag register |
| C. | ALU |
| D. | All of the above |
| Answer» E. | |
| 48. |
How many pins make up the keyboard section in an Intel 8279? |
| A. | 8 |
| B. | 10 |
| C. | 4 |
| D. | 6 |
| Answer» C. 4 | |
| 49. |
What is the IC no. for the programmable keyboard display interface? |
| A. | Intel 8237 |
| B. | Intel 8279 |
| C. | Intel 8234 |
| D. | Intel 8179 |
| Answer» C. Intel 8234 | |
| 50. |
How many pins are there in IC 8259 A? |
| A. | 24 |
| B. | 28 |
| C. | 12 |
| D. | 40 |
| Answer» C. 12 | |