Related MCQs

• The state transition given below is realized by a clocked JK FF. StateTransitionQnQn+100011011The JK input to realize the transition is
• The octal equivalent of the HEX number AB.CD is
• A mod-2 counter followed by a mod-5 counter is
• The output Qn of a J-K flip-flop is zero. It change to 1 when a clock pulse is applied. The input Jn and Kn are respectively
• A 5 bit D/A converter has a current output for a digital input of 10100. If an output current of 10 m A is produced, what will Iout be for a digital input of 11101?
• For a MOD-12 counter, FF hasa tpd = 60 ns. NAND gate has a tpd of 25 ns. The clock frequency is
• Assuming that only X and Y logic inputs are available and their complements X and Y are not available, then what is the minimum number of two-input nand gates require to implement X Y?
• The minimum number of NAND gates required to implement A + AB + ABC is equal to
• An 8-bi t di gi t al -r amp ADC wi t h a 40 mV resolution uses a clock frequency of 2.5 MHz and a comparator with VT = 1mV. The digital output for VA = 6.000 V is
• The increasing order of speed of data access for the following devices is (i) Cache Memory(ii) CDROM (iii) Dynamic RAM (iv) Processor Registers (v) Magnetic Tape Codes: