The simplified block diagram of a 10-bi t A/D converter of dual slope – McqOptions

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1.	The simplified block diagram of a 10-bi t A/D converter of dual slope integrator type is shown in the given figure. The 10-bit counter at the output is clocked by a 1 MHz clock. Assuming negligible timing overhead for the control logic, the maximum frequency of the analog signal that can be converted using this A/D converter is approximately _________kHz
A.	1
B.	2
C.	3
D.	5
Answer» B. 2

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