The following switching functions are to be implemented using a decod – McqOptions

MCQOPTIONS

1.	The following switching functions are to be implemented using a decoder: f1 = ∑m(1, 2, 4, 8, 10, 14) f2 = ∑m(2, 5, 9, 11) f3 = ∑m(2, 4, 5, 6, 7) The minimum configuration of decoder will be __________
A.	2 to 4 line
B.	3 to 8 line
C.	4 to 16 line
D.	5 to 32 line
Answer» D. 5 to 32 line

Discussion

No Comment Found

Related MCQs

The gates required to build a half adder are __________
Which of the following are known as universal gates?
A full adder logic circuit will have __________
A universal logic gate is one which can be used to generate any logic function. Which of the following is a universal logic gate?
The NOR gate output will be high if the two inputs are __________
The following switching functions are to be implemented using a decoder: f1 = ∑m(1, 2, 4, 8, 10, 14) f2 = ∑m(2, 5, 9, 11) f3 = ∑m(2, 4, 5, 6, 7) The minimum configuration of decoder will be __________
The code where all successive numbers differ from their preceding number by single bit is __________
The output of a logic gate is 1 when all the input are at logic 0 as shown below: The gate is either _________