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1. |
A voltage source Vs = Vm sin‚âà √¨‚à ö¬¢t is connected in series with a resistance R and an SCR. At some firing angle delay of ‚âà √≠¬¨¬± a positive gate pulse is applied to the SCR which turns on the SCR. Considering ideal conditions, at the instant ‚âà √≠¬¨¬± the voltage at the resistor terminals Vo |
A. | falls to zero |
B. | falls to ‚Äö√Ñ√∂‚à ö√ë‚à ö¬®Vm sin ‚âà √≠¬¨¬± |
C. | rises to Vm sin ≈ í¬± |
D. | rises to Vm sin ‚âà √¨‚à ö¬¢t |
Answer» D. rises to Vm sin ‚âà √¨‚à ö¬¢t | |