MCQOPTIONS
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MCQOPTIONS
This section includes 10 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Organization knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
DDR_SDRAM‚ÄÖ√Ñ√∂‚ÀÖ√Ë‚ÀÖ¬•S_PERFORM_FASTER_DATA_TRANSFER_BY________?$# |
| A. | Integrating the hardware |
| B. | Transferring on both edges |
| C. | Improving the clock speeds |
| D. | Increasing the bandwidth |
| Answer» C. Improving the clock speeds | |
| 2. |
To_improve_the_data_retrieval_rate$ |
| A. | The memory is divided into two banks |
| B. | The hardware is changed |
| C. | The clock frequency is increased |
| D. | None of the mentioned |
| Answer» B. The hardware is changed | |
| 3. |
The SDRAM performs operation on the ______? |
| A. | Rising edge of the clock |
| B. | Falling edge of the clock |
| C. | Middle state of the clock |
| D. | Transition state of the clock |
| Answer» B. Falling edge of the clock | |
| 4. |
In SDRAM’s buffers are used to store data that is read or written.$ |
| A. | True |
| B. | False |
| Answer» B. False | |
| 5. |
The time taken to transfer a word of data to or from the memory is called as ______ |
| A. | Access time |
| B. | Cycle time |
| C. | Memory latency |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 6. |
In a SDRAM each row is refreshed every 64ms. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 7. |
The mode register is used to _______ |
| A. | Select the row or column data transfer mode |
| B. | Select the mode of operation |
| C. | Select mode of storing the data |
| D. | All of the mentioned |
| Answer» C. Select mode of storing the data | |
| 8. |
A _______ is used to restore the contents of the cells. |
| A. | Sense amplifier |
| B. | Refresh counter |
| C. | Restorer |
| D. | None of the mentioned |
| Answer» C. Restorer | |
| 9. |
The difference in the address and data connection between DRAM’s and SDRAM’s is _______$ |
| A. | The usage of more number of pins in SDRAM’s |
| B. | The requirement of more address lines in SDRAM’s |
| C. | The usage of a buffer in SDRAM’s |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 10. |
The difference between DRAM’s and SDRAM’s is/are ________ |
| A. | The DRAM’s will not use the master slave relationship in data transfer |
| B. | The SDRAM’s make use of clock |
| C. | The SDRAM’s are more power efficient |
| D. | None of the mentioned |
| Answer» E. | |