MCQOPTIONS
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MCQOPTIONS
This section includes 30 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Organization knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
How many cycles are used by MSP430, when reti instruction is executed? |
| A. | 3 |
| B. | 4 |
| C. | 5 |
| D. | depends on the conditions |
| Answer» D. depends on the conditions | |
| 2. |
External RST/NMI pin is a nonmaskable interrupt? |
| A. | true |
| B. | false |
| C. | cant be said |
| D. | depends on the conditions |
| Answer» B. false | |
| 3. |
For enabling any interrupt, firstly _____________ |
| A. | GIE=0 |
| B. | GIE=1 |
| C. | None of the mentioned |
| D. | GIE=0 & 1 |
| Answer» C. None of the mentioned | |
| 4. |
What is the purpose of .intvec assembler directive? |
| A. | it creates an interrupt vector entry that points to an interrupt routine name |
| B. | one is used for storage, other for display |
| C. | one stores locally other stores globally |
| D. | the two are the same |
| Answer» B. one is used for storage, other for display | |
| 5. |
What is the purpose of __interrupt() function? |
| A. | it is used to enable the interrupt |
| B. | it is used to disable the interrupt |
| C. | it denotes that the routine is an ISR |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| 6. |
After the interrupt has occurred, the stack is filled with ______________ |
| A. | return address |
| B. | status register |
| C. | return address & status register |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 7. |
MSP430 uses vectored interrupts? |
| A. | true |
| B. | false |
| C. | cant be said |
| D. | depends on the conditions |
| Answer» B. false | |
| 8. |
AN_INTERRUPT_THAT_CAN_BE_TEMPORARILY_IGNORED_IS?$ |
| A. | Vectored interrupt |
| B. | Non-maskable interrupt |
| C. | Maskable interrupt |
| D. | High priority interrupt |
| Answer» D. High priority interrupt | |
| 9. |
EXTERNAL_RST/NMI_PIN_IS_A_NONMASKABLE_INTERRUPT??$ |
| A. | true |
| B. | false |
| C. | cant be said |
| D. | depends on the conditions |
| Answer» B. false | |
| 10. |
THE_RESISTOR_WHICH_IS_ATTACHED_TO_THE_SERVICE_LINE_IS_CALLED______?$ |
| A. | Push-down resistor |
| B. | Pull-up resistor |
| C. | Break down resistor |
| D. | Line resistor |
| Answer» C. Break down resistor | |
| 11. |
CPU as two modes privileged and non-privileged. In order to change the mode from privileged to non-privileged$ |
| A. | A hardware interrupt is needed |
| B. | A software interrupt is needed |
| C. | Either hardware or software interrupt is needed |
| D. | A non-privileged instruction (which does not generate an interrupt)is needed |
| Answer» C. Either hardware or software interrupt is needed | |
| 12. |
The 8085 microprocessor responds to the presence of an interrupt$ |
| A. | As soon as the trap pin becomes ‘LOW’ |
| B. | By checking the trap pin for ‘high’ status at the end of each instruction fetch |
| C. | By checking the trap pin for ‘high’ status at the end of execution of each instruction |
| D. | By checking the trap pin for ‘high’ status at regular intervals |
| Answer» D. By checking the trap pin for ‚Äö√Ñ√∂‚àö√ë‚àö‚â§high‚Äö√Ñ√∂‚àö√ë‚àö¬• status at regular intervals | |
| 13. |
How_many_cycles_are_used_by_MSP430,_when_reti_instruction_is_executed?$ |
| A. | 3 |
| B. | 4 |
| C. | 5 |
| D. | depends on the conditions |
| Answer» D. depends on the conditions | |
| 14. |
How can the processor ignore other interrupts when it is servicing one |
| A. | By turning off the interrupt request line |
| B. | By disabling the devices from sending the interrupts |
| C. | BY using edge-triggered request lines |
| D. | All of the mentioned |
| Answer» E. | |
| 15. |
From amongst the following given scenarios determine the right one to justify interrupt mode of data transfer |
| A. | Bulk transfer of several kilo-byte |
| B. | Moderately large data transfer of more than 1kb |
| C. | Short events like mouse action |
| D. | Keyboard inputs |
| Answer» E. | |
| 16. |
Which interrupt is unmaskable? |
| A. | RST 5.5 |
| B. | RST 7.5 |
| C. | TRAP |
| D. | Both RST 5.5 and 7.5 |
| Answer» D. Both RST 5.5 and 7.5 | |
| 17. |
Which of the following can generate a nonmaskable interrupt? |
| A. | access violation to flash memory, ACCVIFG |
| B. | timer_A interrupt |
| C. | compare / capture interrupt |
| D. | all of the mentioned |
| Answer» B. timer_A interrupt | |
| 18. |
______ type circuits are generally used for interrupt service line? |
| A. | open-collector |
| B. | open-drain |
| C. | XOR |
| D. | XNOR |
| Answer» B. open-drain | |
| 19. |
Nonmaskable vectors are stored at different vector locations? |
| A. | true |
| B. | false |
| C. | cant be said |
| D. | depends on the conditions |
| Answer» C. cant be said | |
| 20. |
A single Interrupt line can be used to service n different devices? |
| A. | True |
| B. | False |
| Answer» B. False | |
| 21. |
For enabling any interrupt, firstly |
| A. | GIE=0 |
| B. | GIE=1 |
| C. | None of the mentioned |
| D. | GIE=0 & 1 |
| Answer» C. None of the mentioned | |
| 22. |
Interrupts form an important part of _____ systems. |
| A. | Batch processing |
| B. | Multitasking |
| C. | Real-time processing |
| D. | Multi-user |
| Answer» D. Multi-user | |
| 23. |
What is the difference between the INTVEC and the RSEG keywords? |
| A. | so that more than one file can store the interrupt vectors in the segment |
| B. | one is used for storage, other for display |
| C. | one stores locally other stores globally |
| D. | the two are the same |
| Answer» B. one is used for storage, other for display | |
| 24. |
The time between the receiver of an interrupt and its service is ______ |
| A. | Interrupt delay |
| B. | Interrupt latency |
| C. | Cycle time |
| D. | Switching time |
| Answer» C. Cycle time | |
| 25. |
What is the function of ________interrupt keyword. |
| A. | it is used to enable the interrupt |
| B. | it is used to disable the interrupt |
| C. | it is used to assign a particular address to a vector |
| D. | all of the mentioned |
| Answer» D. all of the mentioned | |
| 26. |
When the process is returned after an interrupt service ______ should be loaded again. |
| A. | Register contents |
| B. | Condition codes |
| C. | Stack contents |
| D. | Return addresses |
| Answer» E. | |
| 27. |
After the interrupt has occurred, the stack is filled with |
| A. | return address |
| B. | status register |
| C. | return address & status register |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 28. |
The signal sent to the device from the processor to the device after receiving an interrupt is |
| A. | Interrupt-acknowledge |
| B. | Return signal |
| C. | Service signal |
| D. | Permission signal |
| Answer» B. Return signal | |
| 29. |
The return address from the interrupt-service routine is stored on the |
| A. | System heap |
| B. | Processor register |
| C. | Processor stack |
| D. | Memory |
| Answer» D. Memory | |
| 30. |
The interrupt-request line is a part of the |
| A. | Data line |
| B. | Control line |
| C. | Address line |
| D. | None of the mentioned |
| Answer» C. Address line | |