MCQOPTIONS
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MCQOPTIONS
This section includes 16 Mcqs, each offering curated multiple-choice questions to sharpen your Embedded Systems knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Which exception can be masked by clearing the EE bit to zero in the MSR? |
| A. | synchronous imprecise |
| B. | synchronous precise |
| C. | asynchronous imprecise |
| D. | asynchronous precise |
| Answer» E. | |
| 2. |
Which exception is used in the external interrupts and decrementer-caused exceptions? |
| A. | synchronous precise |
| B. | asynchronous precise |
| C. | synchronous imprecise |
| D. | asynchronous imprecise |
| Answer» C. synchronous imprecise | |
| 3. |
Which exceptions are used in the PowerPC for floating point? |
| A. | synchronous imprecise |
| B. | asynchronous imprecise |
| C. | synchronous precise |
| D. | synchronous imprecise |
| Answer» B. asynchronous imprecise | |
| 4. |
What does MSR stand for? |
| A. | machine state register |
| B. | machine software register |
| C. | minimum state register |
| D. | maximum state register |
| Answer» B. machine software register | |
| 5. |
WHICH_EXCEPTIONS_ARE_USED_IN_THE_POWERPC_FOR_FLOATING_POINT??$ |
| A. | synchronous imprecise |
| B. | asynchronous imprecise |
| C. | synchronous precise |
| D. | synchronous imprecise |
| Answer» B. asynchronous imprecise | |
| 6. |
Which exception can be masked by clearing the EE bit to zero in the MSR?$ |
| A. | synchronous imprecise |
| B. | synchronous precise |
| C. | asynchronous imprecise |
| D. | asynchronous precise |
| Answer» E. | |
| 7. |
Which exception is used in the external interrupts and decrementer-caused exceptions?$ |
| A. | synchronous precise |
| B. | asynchronous precise |
| C. | synchronous imprecise |
| D. | asynchronous imprecise |
| Answer» C. synchronous imprecise | |
| 8. |
Which of the following does not support PowerPC architecture? |
| A. | synchronous precise |
| B. | asynchronous precise |
| C. | synchronous imprecise |
| D. | asynchronous imprecise |
| Answer» D. asynchronous imprecise | |
| 9. |
Which registers are used to determine the completion status? |
| A. | MSR |
| B. | flag register |
| C. | DSISR |
| D. | index register |
| Answer» D. index register | |
| 10. |
Which of the exceptions allows the system reset or memory fault? |
| A. | imprecise exception |
| B. | precise exception |
| C. | synchronous exception |
| D. | asynchronous exception |
| Answer» B. precise exception | |
| 11. |
Which of the exceptions are usually a catastrophic failure? |
| A. | imprecise exception |
| B. | precise exception |
| C. | synchronous exception |
| D. | asynchronous exception |
| Answer» B. precise exception | |
| 12. |
In which of the exceptions does the external event causes the exception? |
| A. | synchronous exception |
| B. | asynchronous exception |
| C. | precise |
| D. | imprecise |
| Answer» C. precise | |
| 13. |
How many general types of exceptions are there? |
| A. | 2 |
| B. | 3 |
| C. | 6 |
| D. | 4 |
| Answer» E. | |
| 14. |
What happens when an exception is completed? |
| A. | TRAP instruction executes |
| B. | SWI instruction executes |
| C. | RFI instruction executes |
| D. | terminal count increases |
| Answer» D. terminal count increases | |
| 15. |
How many supervisor registers are associated with the exception mode? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» B. 3 | |
| 16. |
What is the full form of MSR in Risc Exceptions? |
| A. | machine state register |
| B. | machine software register |
| C. | minimum state register |
| D. | maximum state register |
| Answer» B. machine software register | |