MCQOPTIONS
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MCQOPTIONS
This section includes 45 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Logic Design knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Binary counter that count incrementally is called |
| A. | SSI counters |
| B. | LSI counters |
| C. | down counter |
| D. | up counter |
| Answer» E. | |
| 2. |
One binary cell contains information of |
| A. | 1bit |
| B. | 2bit |
| C. | 3bit |
| D. | 4bit |
| Answer» B. 2bit | |
| 3. |
One bit transfer of the information at a time is called |
| A. | serial transfer |
| B. | parallel transfer |
| C. | shifting |
| D. | rotating |
| Answer» B. parallel transfer | |
| 4. |
Register performing shift in one direction is called |
| A. | unidirectional shift register |
| B. | bidirectional shift register |
| C. | left shift register |
| D. | right shift register |
| Answer» B. bidirectional shift register | |
| 5. |
Shift register can shift to |
| A. | left |
| B. | right |
| C. | up |
| D. | both a and b |
| Answer» E. | |
| 6. |
Register that shift the information is called |
| A. | latch |
| B. | counter |
| C. | shift register |
| D. | flip-flop |
| Answer» D. flip-flop | |
| 7. |
PLA stands for |
| A. | programmable lead array |
| B. | programmable logic agency |
| C. | predicted logic array |
| D. | programmable logic array |
| Answer» E. | |
| 8. |
A counter with parallel load can be used to generate number of |
| A. | Latches |
| B. | Flip-flops |
| C. | registers |
| D. | counter sequences |
| Answer» C. registers | |
| 9. |
Ripple counter cannot be described by |
| A. | Boolean equation |
| B. | clock duration |
| C. | graph |
| D. | flow chart |
| Answer» B. clock duration | |
| 10. |
The word time signals can be generated by means of a counter that counts the required number of |
| A. | reset signals |
| B. | Pluses |
| C. | latches |
| D. | flip-flops |
| Answer» C. latches | |
| 11. |
Parallel loading is done with |
| A. | 1 cycle |
| B. | 2 cycle |
| C. | 3 cycle |
| D. | 4 cycle |
| Answer» B. 2 cycle | |
| 12. |
The Register shifting from left to right on both sides is called as |
| A. | unidirectional shift register |
| B. | bidirectional shift register |
| C. | left shift register |
| D. | right shift register |
| Answer» C. left shift register | |
| 13. |
A BCD counter is a |
| A. | mod-5 counter |
| B. | mod-10 counter |
| C. | mod-15 counter |
| D. | mod-20 counter |
| Answer» C. mod-15 counter | |
| 14. |
Control variable of registers is also called |
| A. | store control input |
| B. | load control input |
| C. | store control output |
| D. | load control output |
| Answer» C. store control output | |
| 15. |
MSI counter comes in two categories, one is Ripple counter and second is |
| A. | ripple fashion |
| B. | serial ripple |
| C. | parallel ripple |
| D. | Synchronous counter |
| Answer» B. serial ripple | |
| 16. |
Binary ripple counter is made up of |
| A. | T flip-flop |
| B. | JK flip-flop |
| C. | RS flip-flop |
| D. | both a and b |
| Answer» E. | |
| 17. |
Time to transfer the content of shift register is called |
| A. | word duration |
| B. | clock duration |
| C. | duration |
| D. | bit time |
| Answer» B. clock duration | |
| 18. |
A 8bit flip-flop has |
| A. | 2binary cells |
| B. | 4binary cells |
| C. | 6binary cells |
| D. | 8binary cells |
| Answer» E. | |
| 19. |
8bit information can be stored in |
| A. | 2registers |
| B. | 4registers |
| C. | 6registers |
| D. | 8registers |
| Answer» E. | |
| 20. |
Ripple counter is a type of |
| A. | SSI counters |
| B. | LSI counters |
| C. | MSI counters |
| D. | VLSI counters |
| Answer» D. VLSI counters | |
| 21. |
A group of binary cells is called |
| A. | counter |
| B. | register |
| C. | latch |
| D. | flip-flop |
| Answer» C. latch | |
| 22. |
Flip-flops in registers are |
| A. | present |
| B. | level triggered |
| C. | edge triggered |
| D. | not present |
| Answer» D. not present | |
| 23. |
Special type of registers are |
| A. | latch |
| B. | flip-flop |
| C. | counters |
| D. | memory |
| Answer» D. memory | |
| 24. |
Register giving response to pulse duration is called |
| A. | latch |
| B. | gated latch |
| C. | counters |
| D. | flip-flop |
| Answer» C. counters | |
| 25. |
ROM truth table is identical to the |
| A. | K-map |
| B. | state table |
| C. | graph |
| D. | flow chart |
| Answer» C. graph | |
| 26. |
Circular shift register is called |
| A. | SSI counters |
| B. | LSI counters |
| C. | ring counter |
| D. | ripple counter |
| Answer» D. ripple counter | |
| 27. |
J=K=1 will make flip-flops |
| A. | complemented |
| B. | reversed |
| C. | unchanged |
| D. | stopped |
| Answer» B. reversed | |
| 28. |
BCD counter counts from |
| A. | 0 to 5 |
| B. | 1 to 5 |
| C. | 0 to 9 |
| D. | 1 to 9 |
| Answer» D. 1 to 9 | |
| 29. |
A group of flip-flop makes a |
| A. | clocked sequential circuit |
| B. | sequential circuit |
| C. | clocked combinational circuit |
| D. | combinational circuit |
| Answer» B. sequential circuit | |
| 30. |
Parallel load transfer is done in |
| A. | 1 cycle |
| B. | 2 cycle |
| C. | 3 cycle |
| D. | 4 cycle |
| Answer» B. 2 cycle | |
| 31. |
Binary counter that count reversely is called |
| A. | SSI counters |
| B. | LSI counters |
| C. | down counter |
| D. | up counter |
| Answer» D. up counter | |
| 32. |
Down counter decrement the value by |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» B. 2 | |
| 33. |
A group of flip-flop sensitive to pulse duration is usually called as |
| A. | Registers |
| B. | Latch |
| C. | edge trigger |
| D. | Counter |
| Answer» D. Counter | |
| 34. |
Synchronous counters differ from asynchronous by |
| A. | clock pulse |
| B. | input |
| C. | output |
| D. | time |
| Answer» B. input | |
| 35. |
Time between the clock pulses are called |
| A. | bit duration |
| B. | clock duration |
| C. | duration |
| D. | bit time |
| Answer» E. | |
| 36. |
J=K=0 will make flip-flops |
| A. | changed |
| B. | reversed |
| C. | unchanged |
| D. | stopped |
| Answer» D. stopped | |
| 37. |
BCD counter is also known as |
| A. | parallel counter |
| B. | decade counter |
| C. | synchronous counter |
| D. | VLSI counter |
| Answer» C. synchronous counter | |
| 38. |
Shift registers having four bits will enable the shift control signal for |
| A. | 2 clock pulses |
| B. | 3 clock pulses |
| C. | 4 clock pulses |
| D. | 5 clock pulses |
| Answer» D. 5 clock pulses | |
| 39. |
Transformation of information into registers is called |
| A. | loading |
| B. | gated latch |
| C. | latch |
| D. | storing |
| Answer» B. gated latch | |
| 40. |
A register that is capable for shifting its binary information either to left or the Right side is called as |
| A. | Latch register |
| B. | flip-flops |
| C. | binary register |
| D. | Shift Register |
| Answer» C. binary register | |
| 41. |
A decimal counter has |
| A. | 5 states |
| B. | 10 states |
| C. | 15 states |
| D. | 20 states |
| Answer» C. 15 states | |
| 42. |
Memory that is called a read write memory is |
| A. | ROM |
| B. | EPROM |
| C. | RAM |
| D. | Registers |
| Answer» D. Registers | |
| 43. |
Three decade counter would have |
| A. | 2 BCD counters |
| B. | 3 BCD counters |
| C. | 4 BCD counters |
| D. | 5 BCD counters |
| Answer» C. 4 BCD counters | |
| 44. |
By default counters are incremented by |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» B. 2 | |
| 45. |
The simplest registers only consists of |
| A. | counter |
| B. | EPROM |
| C. | latch |
| D. | flip-flop |
| Answer» E. | |