MCQOPTIONS
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MCQOPTIONS
This section includes 44 Mcqs, each offering curated multiple-choice questions to sharpen your Microprocessors knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The BIU contains FIFO register of size 6 bytes called _____. |
| A. | queue |
| B. | stack |
| C. | segment |
| D. | register |
| Answer» B. stack | |
| 2. |
In a microprocessor system, suppose. TRAP, HOLD, RESET Pin got activated at the same time, while the processor was executing some instructions, then it will first respond to |
| A. | TRAP |
| B. | HOLD |
| C. | RESET |
| D. | None of the above |
| Answer» E. | |
| 3. |
The _________ translates a byte from one code to another code. |
| A. | XLAT |
| B. | XCHNG |
| C. | POP |
| D. | PUSH |
| Answer» B. XCHNG | |
| 4. |
When CPU is not fully loaded, which of the following method of data transfer is preferred |
| A. | DMA |
| B. | Interrupt |
| C. | Polling |
| D. | None of these |
| Answer» E. | |
| 5. |
In microprocessor, the SS is called as ________. |
| A. | single stack |
| B. | stack segment |
| C. | sequence stack |
| D. | random stack |
| Answer» C. sequence stack | |
| 6. |
The CS register stores instruction _____________ in code segment. |
| A. | stream |
| B. | path |
| C. | codes |
| D. | stream line |
| Answer» D. stream line | |
| 7. |
The BIU contains FIFO register of size __________ bytes. |
| A. | 8 |
| B. | 6 |
| C. | 4 |
| D. | 12 |
| Answer» C. 4 | |
| 8. |
The microprocessor determines whether the specified condition exists or not by testing the ______. |
| A. | carry flag |
| B. | conditional flag |
| C. | low type |
| D. | high type |
| Answer» C. low type | |
| 9. |
The BIU pre-fetches the instruction from memory and store them in ________. |
| A. | queue |
| B. | register |
| C. | memory |
| D. | stack |
| Answer» B. register | |
| 10. |
Which RAM is created using MOS transistors ? |
| A. | Dynamic RAM |
| B. | Static RAM |
| C. | Permanent RAM |
| D. | SD RAM |
| Answer» B. Static RAM | |
| 11. |
The index register are used to hold _______. |
| A. | memory register |
| B. | offset address |
| C. | segment memory |
| D. | offset memory |
| Answer» C. segment memory | |
| 12. |
The RAM which is created using bipolar transistors is called |
| A. | Dynamic RAM |
| B. | Static RAM |
| C. | Permanent RAM |
| D. | DDR RAM |
| Answer» C. Permanent RAM | |
| 13. |
BCD stands for: |
| A. | Binary coded decimal |
| B. | Binary coded decoded |
| C. | Both a and b |
| D. | None of these |
| Answer» B. Binary coded decoded | |
| 14. |
Which type of RAM needs regular refresh ? |
| A. | Dynamic RAM |
| B. | Static RAM |
| C. | Permanent RAM |
| D. | SD RAM |
| Answer» B. Static RAM | |
| 15. |
Name of typical dedicated register is: |
| A. | PC |
| B. | IR |
| C. | SP |
| D. | All of these |
| Answer» E. | |
| 16. |
The _______ pin is used to select direct command word. |
| A. | A0 |
| B. | D7-D6 |
| C. | A12 |
| D. | AD7-AD6 |
| Answer» B. D7-D6 | |
| 17. |
________ is the most important segment and it contains the actual assembly language instruction to be executed by the microprocessor: |
| A. | Data segment |
| B. | Code segment |
| C. | Stack segment |
| D. | Extra segment |
| Answer» C. Stack segment | |
| 18. |
The pin of minimum mode AD0-AD15 has ____________ address. |
| A. | 16 bit |
| B. | 20 bit |
| C. | 32 bit |
| D. | 4 bit |
| Answer» C. 32 bit | |
| 19. |
For the most Static RAM the maximum access time is about ____________. |
| A. | 1 ns |
| B. | 10 ns |
| C. | 100 ns |
| D. | 300 ns |
| Answer» D. 300 ns | |
| 20. |
__________ generate interrupt signal to microprocessor and receive acknowledge. |
| A. | priority resolver |
| B. | control logic |
| C. | interrupt request register |
| D. | interrupt register |
| Answer» C. interrupt request register | |
| 21. |
There are primarily two types of register: |
| A. | general purpose register |
| B. | dedicated register |
| C. | Both a and b |
| D. | None of these |
| Answer» D. None of these | |
| 22. |
Bits in IRR interrupt are ______. |
| A. | reset |
| B. | set |
| C. | stop |
| D. | start |
| Answer» C. stop | |
| 23. |
Which of the following statements on DRAM are correct?- Page mode read operation is faster than RAS read. - RAS input remains active during column address strobe. - The row and column addresses are strobed into the internal buffers using RAS and CAS inputs respectively |
| A. | i & iii |
| B. | i & ii |
| C. | All are correct |
| D. | iii only |
| Answer» D. iii only | |
| 24. |
The stack pointer register in a microprocessor |
| A. | counts the number of programs being executing on the microprocessor |
| B. | counts the number of instructions being executing on the microprocessor |
| C. | keeps the address of the next instruction to be fetched |
| D. | holds the address of the top of the stack |
| Answer» E. | |
| 25. |
Accumulator based microprocessor example are: |
| A. | Intel 8085 |
| B. | Motorola 6809 |
| C. | Both a and b |
| D. | None of these |
| Answer» D. None of these | |
| 26. |
BURST refresh in DRAM is also called as ___________. |
| A. | concentrated refresh |
| B. | distributed refresh |
| C. | hidden refresh |
| D. | signal refresh |
| Answer» B. distributed refresh | |
| 27. |
The pin of minimum mode AD0- AD15 has _________ data bus. |
| A. | 4 bit |
| B. | 20 bit |
| C. | 16 bit |
| D. | 32 bit |
| Answer» D. 32 bit | |
| 28. |
The address bus of any microprocessor is always |
| A. | Unidirectional |
| B. | Bi-directional |
| C. | Either unidirectional or bi-directional |
| D. | None of the above |
| Answer» B. Bi-directional | |
| 29. |
The instruction set of a microprocessor |
| A. | is specified by the manufacturers |
| B. | is specified by the user |
| C. | cannot be changed by the user |
| D. | is stored inside the microprocessor |
| Answer» B. is specified by the user | |
| 30. |
The interrupt facility is provided in microprocessor to |
| A. | change the sequence of the instructions being executed |
| B. | stop the microprocessor when desired |
| C. | stop the microprocessor when it starts malfunctioning |
| D. | keep a control on the working of the microprocessor |
| Answer» B. stop the microprocessor when desired | |
| 31. |
The multiplexing of address bus and data buses are used in microprocessor |
| A. | to reduce speed of operation |
| B. | to increase the no. of pins |
| C. | to reduce the number of pins |
| D. | to improve the operation |
| Answer» D. to improve the operation | |
| 32. |
In microprocessor based system I/O ports are used to interface |
| A. | the I/O devices and memory chips |
| B. | the I/P device only |
| C. | the O/P devices only |
| D. | all the I/O devices |
| Answer» E. | |
| 33. |
A bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is known as |
| A. | DMA bus |
| B. | Memory bus |
| C. | Address bus |
| D. | Control bus |
| Answer» C. Address bus | |
| 34. |
microprocessor differentiates between op code data/address |
| A. | the sequence in which memory contents are fetched by it |
| B. | its internal registers |
| C. | the stack pointer |
| D. | the program counter |
| Answer» B. its internal registers | |
| 35. |
In a microprocessor based system the stack is always in |
| A. | microprocessor |
| B. | RAM |
| C. | ROM |
| D. | EPROM |
| Answer» C. ROM | |
| 36. |
A microprocessor without the interrupt facility |
| A. | is best suited for process control system |
| B. | is not useful for process control system |
| C. | cannot be used for DMA operation |
| D. | cannot be interfaced with any I/O devices |
| Answer» C. cannot be used for DMA operation | |
| 37. |
DMA is used between |
| A. | microprocessor and I/O |
| B. | microprocessor and memory |
| C. | memory and I/O |
| D. | none |
| Answer» D. none | |
| 38. |
FPGA means |
| A. | Field Programmable Gate Array |
| B. | Forward Programmable Gate Array |
| C. | Forward Parallel Gate Array |
| D. | Field Parallel Gate Array |
| Answer» B. Forward Programmable Gate Array | |
| 39. |
A microprocessor with a 12-bit address bus will be able to access |
| A. | 1 K bytes |
| B. | 4 K bytes |
| C. | 8 K bytes |
| D. | 10 K bytes |
| Answer» C. 8 K bytes | |
| 40. |
Which of the data transfer is not possible in microprocessor |
| A. | memory to accumulator |
| B. | accumulator to memory |
| C. | memory to memory |
| D. | I/O device to accumulator |
| Answer» D. I/O device to accumulator | |
| 41. |
Which language could be used for programming an FPGA. |
| A. | Verilog |
| B. | VHDL |
| C. | Both A and B |
| D. | None of the above |
| Answer» D. None of the above | |
| 42. |
Basic steps of execution of an instruction is |
| A. | fetch → execute → decode |
| B. | decode → fetch → execute |
| C. | execute → fetch → decode |
| D. | fetch → decode → execute |
| Answer» E. | |
| 43. |
The program counter in a 8085 micro-processor is a 16-bit register, because |
| A. | It counts 16-bits at a time |
| B. | There are 16 address lines |
| C. | It facilitates the user storing 16-bit data temporarily |
| D. | It has to fetch two 8-bit data at a time |
| Answer» C. It facilitates the user storing 16-bit data temporarily | |
| 44. |
In microprocessor based system DMA refers to |
| A. | direct memory access for microprocessor |
| B. | direct memory access for the user |
| C. | direct memory access for the I/O device |
| D. | none of the above |
| Answer» D. none of the above | |