MCQOPTIONS
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MCQOPTIONS
This section includes 24 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The circuit that generates a spike in response to a momentary change of input signal is called ____________ |
| A. | R-C differentiator circuit |
| B. | L-R differentiator circuit |
| C. | R-C integrator circuit |
| D. | L-R integrator circuit |
| Answer» B. L-R differentiator circuit | |
| 2. |
The S-R, J-K and D inputs are called ____________ |
| A. | Asynchronous inputs |
| B. | Synchronous inputs |
| C. | Bidirectional inputs |
| D. | Unidirectional inputs |
| Answer» C. Bidirectional inputs | |
| 3. |
The term synchronous means ____________ |
| A. | The output changes state only when any of the input is triggered |
| B. | The output changes state only when the clock input is triggered |
| C. | The output changes state only when the input is reversed |
| D. | The output changes state only when the input follows it |
| Answer» C. The output changes state only when the input is reversed | |
| 4. |
Flip-flops are ____________ |
| A. | Stable devices |
| B. | Astable devices |
| C. | Bistable devices |
| D. | Monostable devices |
| Answer» D. Monostable devices | |
| 5. |
How many types of triggering take place in a flip flops? |
| A. | 3 |
| B. | 2 |
| C. | 4 |
| D. | 5 |
| Answer» B. 2 | |
| 6. |
S-R type flip-flop can be converted into D type flip-flop if S is connected to R through ____________ |
| A. | OR Gate |
| B. | AND Gate |
| C. | Inverter |
| D. | Full Adder |
| Answer» D. Full Adder | |
| 7. |
If one wants to design a binary counter, the preferred type of flip-flop is ____________ |
| A. | D type |
| B. | S-R type |
| C. | Latch |
| D. | J-K type |
| Answer» E. | |
| 8. |
D flip-flop is a circuit having ____________ |
| A. | 2 NAND gates |
| B. | 3 NAND gates |
| C. | 4 NAND gates |
| D. | 5 NAND gates |
| Answer» D. 5 NAND gates | |
| 9. |
Input clock of RS flip-flop is given to ____________ |
| A. | Input |
| B. | Pulser |
| C. | Output |
| D. | Master slave flip-flop |
| Answer» C. Output | |
| 10. |
The asynchronous input can be used to set the flip-flop to the ____________ |
| A. | 1 state |
| B. | 0 state |
| C. | either 1 or 0 state |
| D. | forbidden State |
| Answer» D. forbidden State | |
| 11. |
WHICH_OF_THE_FOLLOWING_FLIP-FLOPS_IS_FREE_FROM_RACE_AROUND_PROBLEM??$ |
| A. | T flip-flop |
| B. | SR flip-flop |
| C. | Master-Slave Flip-flop |
| D. | None of the Mentioned |
| Answer» B. SR flip-flop | |
| 12. |
How many types of triggering takes place in a flip flops?$ |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» B. 3 | |
| 13. |
Which_of_the_following_is_the_Universal_Flip-flop?$ |
| A. | S-R flip-flop |
| B. | J-K flip-flop |
| C. | Master slave flip-flop |
| D. | D Flip-flop |
| Answer» C. Master slave flip-flop | |
| 14. |
The circuit that generates a spike in response to a momentary change of input signal is called |
| A. | R-C differentiator circuit |
| B. | L-R differentiator circuit |
| C. | R-C integrator circuit |
| D. | L-R integrator circuit |
| Answer» B. L-R differentiator circuit | |
| 15. |
The S-R, J-K and D inputs are called |
| A. | Asynchronous inputs |
| B. | Synchronous inputs |
| C. | Bidirectional inputs |
| D. | Unidirectional inputs |
| Answer» C. Bidirectional inputs | |
| 16. |
The term synchronous means |
| A. | The output changes state only when any of the input is triggered |
| B. | The output changes state only when the clock input is triggered |
| C. | The output changes state only when the input is reversed |
| D. | None of the Mentioned |
| Answer» C. The output changes state only when the input is reversed | |
| 17. |
Flip-flops_are |
| A. | Stable devices |
| B. | Astable devices |
| C. | Bistable devices |
| D. | None of the Mentioned |
| Answer» D. None of the Mentioned | |
| 18. |
S-R type flip-flop can be converted into D type flip-flop if S is connected to R throug? |
| A. | OR Gate |
| B. | Inverter |
| C. | AND Gate |
| D. | Full Adder |
| Answer» D. Full Adder | |
| 19. |
In a positive edge triggered JK flip flop, a low J and low K produces? |
| A. | High state |
| B. | Low state |
| C. | Toggle state |
| D. | None of the Mentioned |
| Answer» E. | |
| 20. |
Master slave flip flop is also referred to as? |
| A. | Level triggered flip flop |
| B. | Pulse triggered flip flop |
| C. | Edge triggered flip flop |
| D. | None of the Mentioned |
| Answer» C. Edge triggered flip flop | |
| 21. |
In JK flip flop same input, i.e. at a particular time or during a clock pulse, the output will oscillate back and forth between 0 and 1. At the end of the clock pulse the value of output Q is uncertain. The situation is referred to as? |
| A. | Conversion condition |
| B. | Race around condition |
| C. | Lock out state |
| D. | None of the Mentioned |
| Answer» C. Lock out state | |
| 22. |
D flip-flop is a circuit having |
| A. | 2 NAND gates |
| B. | 3 NAND gates |
| C. | 4 NAND gates |
| D. | 5 NAND gates |
| Answer» D. 5 NAND gates | |
| 23. |
Input clock of RS flip-flop is given to |
| A. | Input |
| B. | Pulser |
| C. | Output |
| D. | Master slave flip-flop |
| Answer» C. Output | |
| 24. |
The asynchronous input can be used to set the flip-flop to the |
| A. | 1 state |
| B. | 0 state |
| C. | either 1 or 0 state |
| D. | none of the Mentioned |
| Answer» D. none of the Mentioned | |