MCQOPTIONS
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This section includes 11 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
A stepper motor HDL application must include _____________ |
| A. | Sequencers and multiplexers |
| B. | Types and bits |
| C. | Counters and decoders |
| D. | Variables and processes |
| Answer» D. Variables and processes | |
| 2. |
A major block which is not a part of an HDL frequency counter _____________ |
| A. | Timing and control unit |
| B. | Decoder/display |
| C. | Display register |
| D. | Bit shifter |
| Answer» E. | |
| 3. |
In the keypad application, the preset state of the ring counter define _____________ |
| A. | The NANDing of the columns |
| B. | The NANDing of the rows |
| C. | The proper output of the column encoder |
| D. | The proper output of the row encoder |
| Answer» E. | |
| 4. |
A step which should be followed in project management is known as _____________ |
| A. | Overall definition |
| B. | System documentation |
| C. | Synthesis and testing |
| D. | System integration |
| Answer» C. Synthesis and testing | |
| 5. |
In a digital clock application, the basic frequency must be divided down as _____________ |
| A. | 1 Hz |
| B. | 60 Hz |
| C. | 100 Hz |
| D. | 1000 Hz |
| Answer» B. 60 Hz | |
| 6. |
The output frequency related to the sampling interval of a frequency counter as _____________ |
| A. | Directly with the sampling interval |
| B. | Inversely with the sampling interval |
| C. | More precision with longer sampling interval |
| D. | Less precision with longer sampling interval |
| Answer» D. Less precision with longer sampling interval | |
| 7. |
At high frequencies when the sampling interval is too long in a frequency counter _____________ |
| A. | The counter works fine |
| B. | The counter undercounts the frequency |
| C. | The measurement is less precise |
| D. | The counter overflows |
| Answer» E. | |
| 8. |
VHDL is being used for _____________ |
| A. | Documentation |
| B. | Verification |
| C. | Synthesis of large digital design |
| D. | All of the Mentioned |
| Answer» E. | |
| 9. |
VHSIC stands for _____________ |
| A. | Very High Speed Integrated Circuits |
| B. | Very Higher Speed Integration Circuits |
| C. | Variable High Speed Integrated Circuits |
| D. | Variable Higher Speed Integration Circuits |
| Answer» B. Very Higher Speed Integration Circuits | |
| 10. |
The full form of VHDL is _____________ |
| A. | Very High Descriptive Language |
| B. | Verilog Hardware Description Language |
| C. | Variable Definition Language |
| D. | None of the Mentioned |
| Answer» C. Variable Definition Language | |
| 11. |
The full form of HDL is _________________ |
| A. | Higher Descriptive Language |
| B. | Higher Definition Language |
| C. | Hardware Description Language |
| D. | High Descriptive Language |
| Answer» D. High Descriptive Language | |