Explore topic-wise MCQs in Computer Organization.

This section includes 7 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Organization knowledge and support exam preparation. Choose a topic below to get started.

1.

The added output of the bits of the interrupt register and the mask register is set as an input of ______________

A. Priority decoder
B. Priority encoder
C. Process id encoder
D. Multiplexer
Answer» C. Process id encoder
Discussion
2.

______________ register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt.

A. Mass
B. Mark
C. Make
D. Mask
Answer» E.
Discussion
3.

______ interrupt method uses register whose bits are set separately by interrupt signal for each device.

A. Parallel priority interrupt
B. Serial priority interrupt
C. Daisy chaining
D. None of the mentioned
Answer» B. Serial priority interrupt
Discussion
4.

In daisy chaining device 0 will pass the signal only if it has _______

A. Interrupt request
B. No interrupt request
C. Both No interrupt and Interrupt request
D. None of the mentioned
Answer» C. Both No interrupt and Interrupt request
Discussion
5.

The processor indicates to the devices that it is ready to receive interrupts ________

A. By enabling the interrupt request line
B. By enabling the IRQ bits
C. By activating the interrupt acknowledge line
D. None of the mentioned
Answer» D. None of the mentioned
Discussion
6.

The starting address sent by the device in vectored interrupt is called as __________

A. Location id
B. Interrupt vector
C. Service location
D. Service id
Answer» C. Service location
Discussion
7.

The interrupt servicing mechanism in which the requesting device identifies itself to the processor to be serviced is ___________

A. Polling
B. Vectored interrupts
C. Interrupt nesting
D. Simultaneous requesting
Answer» C. Interrupt nesting
Discussion