

MCQOPTIONS
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This section includes 6 Mcqs, each offering curated multiple-choice questions to sharpen your Vhdl knowledge and support exam preparation. Choose a topic below to get started.
1. |
Optimized implementation of Boolean functions reduces the cost of implementation. |
A. | True |
B. | False |
Answer» B. False | |
2. |
A Multiplication by 2 logic is to be designed by using the VHDL code, which of the following operator can be used to implement the same? |
A. | SRL |
B. | SRA |
C. | SLA |
D. | SLL |
Answer» E. | |
3. |
In designing logic functions in VHDL, we can use arithmetic operators. |
A. | True |
B. | False |
Answer» B. False | |
4. |
Which of the following is not representing a nibble? |
A. | x<= 0101 |
B. | x<= STD_LOGIC_VECTOR (0 TO 4) |
C. | x<= STD_LOGIC_VECTOR(3 DOWNTO 0) |
D. | x<= BIT_VECTOR (1 TO 4) |
Answer» C. x<= STD_LOGIC_VECTOR(3 DOWNTO 0) | |
5. |
The maximum number of parameters in port map() function while implementing logic function using gates only, is equal to ____________ |
A. | Number of inputs |
B. | Number of outputs |
C. | Number of inputs + number of outputs |
D. | Infinite |
Answer» D. Infinite | |
6. |
What do you use to perform basic logic functions in VHDL while creating concurrent code? |
A. | Operators |
B. | If statement |
C. | PROCESS |
D. | GENERATE |
Answer» B. If statement | |