MCQOPTIONS
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MCQOPTIONS
This section includes 445 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Science Engineering (CSE) knowledge and support exam preparation. Choose a topic below to get started.
| 51. |
What is the average running time of a quick sort algorithm? |
| A. | o(n) |
| B. | o(n log n) |
| C. | o(n2) |
| D. | o(log n) |
| Answer» C. o(n2) | |
| 52. |
What is the average case time complexity of odd-even transposition sort? |
| A. | o(n log n) |
| B. | o(n) |
| C. | o(log n) |
| D. | o(n2) |
| Answer» E. | |
| 53. |
What is the worst case time complexity of a quick sort algorithm? |
| A. | o(n) |
| B. | o(n log n) |
| C. | o(n2) |
| D. | o(log n) |
| Answer» D. o(log n) | |
| 54. |
In Binary tree representation created by execution of Quick sort, Pivot is at |
| A. | leaf node |
| B. | root of tree |
| C. | any internal node |
| D. | none of the above |
| Answer» C. any internal node | |
| 55. |
In first step of parallelizing quick sort for n elements to get subarrays, which of the following statement is TRUE |
| A. | only one process is used |
| B. | n processes are used |
| C. | two processes are used |
| D. | none of the above |
| Answer» B. n processes are used | |
| 56. |
Quick sort uses Recursive Decomposition |
| A. | true |
| B. | false |
| Answer» B. false | |
| 57. |
Pivot in Quick sort can be selected as |
| A. | always first element |
| B. | always last element |
| C. | always middle index element |
| D. | randomly selected element |
| Answer» E. | |
| 58. |
Quicksort's performance is greatly affected by the way it partitions a sequence. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 59. |
Which is the fastest sorting algorithm |
| A. | bubble sort |
| B. | odd-even transposition sort |
| C. | shell sort |
| D. | quick sort |
| Answer» E. | |
| 60. |
What is TRUE about SHELL SORT |
| A. | moves elements only one position at a time |
| B. | moves elements long distance |
| C. | during second phase algorithm switches to odd even transposition sort |
| D. | both 2 and 3 |
| Answer» E. | |
| 61. |
The odd-even transposition algorithm sorts n elements in n phases (n is even), each of which requires ------------compare-exchange operations |
| A. | 2n |
| B. | n2 |
| C. | n/2 |
| D. | n |
| Answer» D. n | |
| 62. |
Which is the sorting algorithm in below given steps - 1. procedure X_SORT(n) 2. begin 3. for i := n - 1 downto 1 do 4. for j := 1 to i do 5. compare-exchange(aj, aj + 1); 6. end X_SORT |
| A. | selection sort |
| B. | bubble sort |
| C. | parallel selcetion sort |
| D. | parallel bubble sort |
| Answer» C. parallel selcetion sort | |
| 63. |
Which of following is NOT A WAY of mapping the input wires of the bitonic sorting network to a MESH of processes |
| A. | row major mapping |
| B. | column major mapping |
| C. | row major snakelike mapping |
| D. | row major shuffled mapping |
| Answer» C. row major snakelike mapping | |
| 64. |
While mapping Bitonic sort on Hypercube, Compare-exchange operations take place between wires whose labels differ in |
| A. | one bit |
| B. | two bits |
| C. | three bits |
| D. | four bits |
| Answer» B. two bits | |
| 65. |
The procedure of sorting a bitonic sequence using bitonic splits is called |
| A. | bitonic merge |
| B. | bitonic split |
| C. | bitonic divide |
| D. | bitonic series |
| Answer» B. bitonic split | |
| 66. |
Which of the following is NOT a BITONIC Sequence |
| A. | {8, 6, 4, 2, 3, 5, 7, 9} |
| B. | {0, 4, 8, 9, 2, 1} |
| C. | {3, 5, 7, 9, 8, 6, 4, 2} |
| D. | {1, 2, 4, 7, 6, 0, 1} |
| Answer» E. | |
| 67. |
Which of the following is TRUE for Bitonic Sequence a) Monotonically increasing b) Monotonically Decreasing c) With cyclic shift of indices d) First increasing then decreasing |
| A. | a) and b) |
| B. | a) and b) and d) |
| C. | a) and b) and c) |
| D. | a) and b) and c) and d) |
| Answer» E. | |
| 68. |
In sorting networks for DECREASING COMPARATOR with input x,y select the correct output X', Y' from the following options |
| A. | x\ = min { x , y } and y\ = min { x , y } |
| B. | x\ = max { x , y } and y\ = min { x , y } |
| C. | x\ = min { x , y } and y\ = max{ x , y } |
| D. | x\ = max { x , y } and y\ = max { x , y } |
| Answer» C. x\ = min { x , y } and y\ = max{ x , y } | |
| 69. |
In sorting networks for INCREASING COMPARATOR with input x,y select the correct output X', Y' from the following options |
| A. | x\ = min { x , y } and y\ = min { x , y } |
| B. | x\ = max { x , y } and y\ = min { x , y } |
| C. | x\ = min { x , y } and y\ = max{ x , y } |
| D. | x\ = max { x , y } and y\ = max { x , y } |
| Answer» D. x\ = max { x , y } and y\ = max { x , y } | |
| 70. |
Which of the following statements is NOT TRUE for Internal Sorting algorithms |
| A. | usually deal with small number of elements |
| B. | no of elements must be able to fit in process\s main memory |
| C. | use auxilliary memory like tape or hard disk |
| D. | ususally are of type compare-exchange |
| Answer» D. ususally are of type compare-exchange | |
| 71. |
Which of the following is not a Pipeline Conflicts? |
| A. | timing variations |
| B. | branching |
| C. | load balancing |
| D. | data dependency |
| Answer» D. data dependency | |
| 72. |
The VLIW architecture follows ..... approach to achieve parallelism. |
| A. | misd |
| B. | sisd |
| C. | simd |
| D. | mimd |
| Answer» E. | |
| 73. |
The VLIW processors are much simpler as they do not require of ..... |
| A. | computational register |
| B. | complex logic circuits |
| C. | ssd slots |
| D. | scheduling hardware |
| Answer» E. | |
| 74. |
The parallel execution of operations in VLIW is done according to the schedule determined by ..... |
| A. | sk scheduler |
| B. | interpreter |
| C. | compiler |
| D. | encoder |
| Answer» D. encoder | |
| 75. |
The important feature of the VLIW is ..... |
| A. | ilp |
| B. | cost effectiveness |
| C. | performance |
| D. | none of the mentioned |
| Answer» B. cost effectiveness | |
| 76. |
Which of the following is a combination of several processors on a single chip? |
| A. | multicore architecture |
| B. | risc architecture |
| C. | cisc architecture |
| D. | subword parallelism |
| Answer» B. risc architecture | |
| 77. |
______ have been developed specifically for pipelined systems. |
| A. | utility software |
| B. | speed up utilities |
| C. | optimizing compilers |
| D. | none of the above |
| Answer» D. none of the above | |
| 78. |
In super-scalar processors, ________ mode of execution is used. |
| A. | in-order |
| B. | post order |
| C. | out of order |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 79. |
which of the following is not static network |
| A. | bus |
| B. | ring |
| C. | mesh |
| D. | crossbar switch |
| Answer» E. | |
| 80. |
the number of switch requirement for a network with n input and n output is ------------------ |
| A. | n |
| B. | n2 |
| C. | n3 |
| D. | n4 |
| Answer» C. n3 | |
| 81. |
time taken by header of a message between two directly connected nodes is called as----------------- |
| A. | startup time |
| B. | per hop time |
| C. | per word transfer time |
| D. | packaging time |
| Answer» C. per word transfer time | |
| 82. |
superscalar architecture contains -------------execution units for instruction execution |
| A. | multiple |
| B. | single |
| C. | none of the above |
| Answer» B. single | |
| 83. |
snoopy cache protocol are used in -----------------based system |
| A. | bus |
| B. | mesh |
| C. | star |
| D. | hypercube |
| Answer» B. mesh | |
| 84. |
Which method is used as an alternative way of snooping-based coherence protocol? |
| A. | directory protocol |
| B. | memory protocol |
| C. | compiler based protocol |
| D. | none of above |
| Answer» B. memory protocol | |
| 85. |
In a three-cube structure, node 101 cannot communicate directly with node? |
| A. | 1 |
| B. | 11 |
| C. | 100 |
| D. | 111 |
| Answer» C. 100 | |
| 86. |
How many switch points are there in crossbar switch network that connects 9 processors to 6 memory modules? |
| A. | 50 |
| B. | 63 |
| C. | 60 |
| D. | 54 |
| Answer» E. | |
| 87. |
Which combinational device is used in crossbar switch for selecting proper memory from multiple addresses? |
| A. | multiplexer |
| B. | decoder |
| C. | encoder |
| D. | demultiplexer |
| Answer» B. decoder | |
| 88. |
Which of the following is not one of the interconnection structures? |
| A. | crossbar switch |
| B. | hypercube system |
| C. | single port memory |
| D. | time-shared common bus |
| Answer» D. time-shared common bus | |
| 89. |
Multiprocessors are classified as ________. |
| A. | simd |
| B. | mimd |
| C. | sisd |
| D. | misd |
| Answer» C. sisd | |
| 90. |
How many processors can be organized in 5-dimensional binary hypercube system? |
| A. | 25 |
| B. | 10 |
| C. | 32 |
| D. | 20 |
| Answer» D. 20 | |
| 91. |
Which mechanism performs an analysis on the code to determine which data items may become unsafe for caching, and they mark those items accordingly? |
| A. | directory protocol |
| B. | snoopy protocol |
| C. | server based cache coherence |
| D. | compiler based cache coherence |
| Answer» E. | |
| 92. |
multipoint topology is |
| A. | bus |
| B. | star |
| C. | mesh |
| D. | ring |
| Answer» B. star | |
| 93. |
A topology that involves Tokens. |
| A. | star |
| B. | ring |
| C. | bus |
| D. | daisy chaining |
| Answer» C. bus | |
| 94. |
The major disadvantage of pipeline is: |
| A. | high cost individual dedicated |
| B. | initial setup time |
| C. | if branch instruction is encountered the pipe has to be flushed |
| D. | all of the above |
| Answer» D. all of the above | |
| 95. |
VLIW stands for: |
| A. | vector large instruction word |
| B. | very long instruction word |
| C. | very large integrated word |
| D. | very low integrated word |
| Answer» C. very large integrated word | |
| 96. |
M.J. Flynn's parallel processing classification is based on: |
| A. | multiple instructions |
| B. | multiple data |
| C. | both (a) and (b) |
| D. | none of the above |
| Answer» D. none of the above | |
| 97. |
MIPS stands for: |
| A. | memory instruction per second |
| B. | major instruction per second |
| C. | main information per second |
| D. | million instruction per second |
| Answer» E. | |
| 98. |
 MIMD stands for |
| A. | multiple instruction multiple data |
| B. | multiple instruction memory data |
| C. | memory instruction multiple data |
| D. | multiple information memory data |
| Answer» B. multiple instruction memory data | |
| 99. |
A Von Neumann computer uses which one of the following? |
| A. | sisd |
| B. | simd |
| C. | misd |
| D. | mimd. |
| Answer» B. simd | |
| 100. |
General MIMD configuration usually called |
| A. | a multiprocessor |
| B. | a vector processor |
| C. | array processor |
| D. | none of the above. |
| Answer» B. a vector processor | |