

MCQOPTIONS
This section includes 54 Mcqs, each offering curated multiple-choice questions to sharpen your Logic Gates knowledge and support exam preparation. Choose a topic below to get started.
1. |
The maximum frequency at which digital data can be applied to gate is caled |
A. | Operating speed |
B. | Propagation speed |
C. | Binary level transaction period |
D. | Charging time |
Answer» B. Propagation speed | |
2. |
Which combination of gates does not allow the implementation of an arbitrary boolean function? |
A. | OR gates and AND gates only |
B. | OR gates and exclusive OR gate only |
C. | OR gates and NOT gates only |
D. | NAND gates only |
Answer» B. OR gates and exclusive OR gate only | |
3. |
A demultiplexer is used to |
A. | Route the data from single input to one of many outputs |
B. | Perform serial to parallel conversion |
C. | Both (a) & (b) |
D. | Select data from several inputs and route it to single output |
Answer» D. Select data from several inputs and route it to single output | |
4. |
How many full adders are required to construct an m-bit parallel adder ? |
A. | m/2 |
B. | m-1 |
C. | m |
D. | m+1 |
Answer» C. m | |
5. |
Which table shows the logical state of a digital circuit output for every possible combination of logical states in the inputs ? |
A. | Function table |
B. | Truth table |
C. | Routing table |
D. | ASCII table |
Answer» C. Routing table | |
6. |
Which of the following gates is known as coincidence detector ? |
A. | AND gate |
B. | OR gate |
C. | NOT gate |
D. | NAND gate |
Answer» B. OR gate | |
7. |
An AND circuit |
A. | is a memory circuit |
B. | gives an output when all input signals are present simultaneously |
C. | is a -ve OR gate |
D. | is a linear circuit |
Answer» C. is a -ve OR gate | |
8. |
Which one of the following set of gates are best suited for 'parity' checking and 'parity' generation. |
A. | AND, OR, NOT gates |
B. | EX-NOR or EX-OR gates |
C. | NAND gates |
D. | NOR gates |
Answer» C. NAND gates | |
9. |
The inverter OR-gate and AND gate are called deeision-making elements because they can recognize some input while disregarding others. A gate recognize a word when its output is |
A. | words,high |
B. | bytes,low |
C. | bytes,high |
D. | character,low |
Answer» B. bytes,low | |
10. |
In which of the following adder circuits, the carry look ripple delay is eliminated ? |
A. | Half adder |
B. | Full adder |
C. | Parallel adder |
D. | Carry-look-ahead adder |
Answer» D. Carry-look-ahead adder | |
11. |
Adders |
A. | adds 2 bits |
B. | is called so because a full adder involves two half-adders |
C. | needs two input and generates two output |
D. | All of these |
Answer» E. | |
12. |
Which of the following circuit can be used as parallel to serial converter ? |
A. | Multiplexer |
B. | Demultiplexer |
C. | Decoder |
D. | Digital counter |
Answer» B. Demultiplexer | |
13. |
A combinational logic circuit which generates a particular binary word or number is |
A. | Decoder |
B. | Multiplexer |
C. | Encoder |
D. | Demultiplexer |
Answer» B. Multiplexer | |
14. |
A combinational circuit is one in which the output depends on the |
A. | input combination at the time |
B. | input combination and the previous output |
C. | input combination at that time and the previous input combination |
D. | present output and the previous output |
Answer» B. input combination and the previous output | |
15. |
The function of a multiplexer is |
A. | to decode information |
B. | to select 1 out of N input data sources and to transmit it to single channel |
C. | to transit data on N lines |
D. | to perform serial to parallel conversion |
Answer» C. to transit data on N lines | |
16. |
Extremely low power dissipation and low cost per gate can be achieved in: |
A. | MOS ICs |
B. | C MOS ICs |
C. | TTL ICs |
D. | ECL ICs |
Answer» C. TTL ICs | |
17. |
An example of a universal building block is: |
A. | EX-OR gate |
B. | AND gate |
C. | OR gate |
D. | NOR gate |
Answer» E. | |
18. |
The full adder adds the Kth bits of two numbers to the |
A. | difference of the previous bits |
B. | sum of all previous bits |
C. | carry from ( K - 1 )TH bit |
D. | sum of previous bit |
Answer» D. sum of previous bit | |
19. |
A full-adder is a logic circuit which can add two single order bits plus a carry in from a previous adder. Its incomplete truth table is given in the table below. The missing entry in the outputs for SUM and CARRY out are
|
|||||||||||||||||||||||
A. | 0 0 | |||||||||||||||||||||||
B. | 0 1 | |||||||||||||||||||||||
C. | 1 0 | |||||||||||||||||||||||
D. | 1 1 | |||||||||||||||||||||||
Answer» E. | ||||||||||||||||||||||||
20. |
The number of two input multiplexers required to construct a 210 input multiplexer is, |
A. | 31 |
B. | 10 |
C. | 127 |
D. | 1023 |
Answer» E. | |
21. |
If A B = C, then |
A. | A C = B |
B. | B C = A |
C. | A B C = 0 |
D. | Both (a) & (b) |
Answer» E. | |
22. |
A small dot or circle printed on top of an IC indicates |
A. | Vcc |
B. | Gnd |
C. | Pin 14 |
D. | Pin 1 |
Answer» E. | |
23. |
Which one of the following logic expression is incorrect? |
A. | 1 0 = 1 |
B. | 1 1 0 = 1 |
C. | 1 1 1 = 1 |
D. | 1 1 = 0 |
Answer» C. 1 1 1 = 1 | |
24. |
Which of the following adders can add three or more numbers at a time ? |
A. | Parallel adder |
B. | Carry-look-ahead adder |
C. | Carry-save-adder |
D. | Full adder |
Answer» D. Full adder | |
25. |
If four 4 input multiplexers drive a 4 input multiplexer, we get a: |
A. | 16 input MUX |
B. | 8 input MUX |
C. | 4 input MUX |
D. | 2 input MUX |
Answer» B. 8 input MUX | |
26. |
The characteristic equation of D flip-flop is: |
A. | Q = 1 |
B. | Q = 0 |
C. | Q = D |
D. | Q= D |
Answer» E. | |
27. |
The dual ofthe switching function x + yz is: |
A. | x+yz |
B. | x + y z |
C. | x(y+z) |
D. | x (y + z ) |
Answer» D. x (y + z ) | |
28. |
If a logic gates has four inputs, then total number of possible input combinations is |
A. | 4 |
B. | 8 |
C. | 16 |
D. | 32 |
Answer» D. 32 | |
29. |
A comparison between serial and parallel adder reveals that serial order |
A. | is slower |
B. | is faster |
C. | operates at the same speed as parallel adder |
D. | is more complicated |
Answer» B. is faster | |
30. |
What is the largest number of data inputs which a data selector with two control inputs can have ? |
A. | 2 |
B. | 4 |
C. | 8 |
D. | 16 |
Answer» C. 8 | |
31. |
How many truth tables can be made from one function table ? |
A. | One |
B. | Two |
C. | Three |
D. | Any numbers |
Answer» C. Three | |
32. |
A toggle operation cannot be performed using a single |
A. | NOR gate |
B. | AND gate |
C. | NAND gate |
D. | XOR gate |
Answer» C. NAND gate | |
33. |
What is the minimum number of 2 input NAND gates required to implement the function |
A. | 6 |
B. | 5 |
C. | 4 |
D. | 3 |
Answer» D. 3 | |
34. |
Which table shows the electrical state of a digital circuit's output for every possible combination of electrical states in the inputs ? |
A. | Function table |
B. | Truth table |
C. | Routing table |
D. | ASCII table |
Answer» B. Truth table | |
35. |
How many lines the truth table for a four-input NOR gate would contain to cover all possible input combinations ? |
A. | 4 |
B. | 8 |
C. | 12 |
D. | 16 |
Answer» E. | |
36. |
The output of NOR gate is |
A. | High if all of its inputs are high |
B. | Low if all of its inputs are low |
C. | High if all of its inputs are low |
D. | High if only of its inputs is low |
Answer» D. High if only of its inputs is low | |
37. |
The digital multiplexer is basically a combination logic circuit to perform the operation |
A. | AND-AND |
B. | OR-OR |
C. | AND-OR |
D. | OR-AND |
Answer» D. OR-AND | |
38. |
Write the Boolean expression for an inverter logic gate with input C and output Y. |
A. | Y |
B. | C |
C. | Y |
D. | |
Answer» C. Y | |
39. |
Which of the following expressions is not equivalent to X ' ? |
A. | X NAND X |
B. | X NOR X |
C. | X NAND 1 |
D. | X NOR 1 |
Answer» E. | |
40. |
The time required for a pulse to decrease from 90 to 10 per cent of its maximum value is called |
A. | Rise time |
B. | Decay time |
C. | Binary level transition period |
D. | Propagation delay |
Answer» C. Binary level transition period | |
41. |
Which of the following statements is wrong ? |
A. | Propagation delay is the time required for a gate to change its state |
B. | Noise immunity is the amount of noise which can be applied to the input of a gate without causing the gate to change state |
C. | Fan-in of a gate is always equal to fan-out of the same gate |
D. | Operating speed is the maximum frequency at which digital data can be applied to a gate |
Answer» D. Operating speed is the maximum frequency at which digital data can be applied to a gate | |
42. |
The number of full and half-adders required to add 16-bit numbers is |
A. | 8 half-adders, 8 full-adders |
B. | 1 half-adder, 15 full-adders |
C. | 16 half-adders, 0 full-adders |
D. | 4 half-adders, 12 full-adders |
Answer» C. 16 half-adders, 0 full-adders | |
43. |
Which of the following gates would output 1 when one input is 1 and other input is 0 ? |
A. | OR gate |
B. | AND gate |
C. | NAND gate |
D. | both (a) and (c) |
Answer» E. | |
44. |
Which one of the following will give the sum of full adders as output ? |
A. | Three point majority circuit |
B. | Three bit parity checker |
C. | Three bit comparator |
D. | Three bit counter |
Answer» E. | |
45. |
Odd parity of word can beconveniently tested by |
A. | OR gate |
B. | AND gate |
C. | NOR gate |
D. | XOR gate |
Answer» E. | |
46. |
What is the minimum number of two-input NAND gates used to perform the function of two input OR gate ? |
A. | one |
B. | two |
C. | three |
D. | four |
Answer» D. four | |
47. |
Which of the following gates are added to the inputs of the OR gate to convert it to the NAND gate ? |
A. | NOT |
B. | AND |
C. | OR |
D. | XOR |
Answer» B. AND | |
48. |
A one-to-four line demultiplexer is to be implemented using a memory. How many bits must each word have ? |
A. | 1 bit |
B. | 2 bits |
C. | 4 bits |
D. | 8 bits |
Answer» B. 2 bits | |
49. |
What logic function is produced by adding an inverter to the output of an AND gate ? |
A. | NAND |
B. | NOR |
C. | XOR |
D. | OR |
Answer» B. NOR | |
50. |
The EXCLUSIVE NOR gate is equivalent to which gate followed by an inverter ? |
A. | OR |
B. | AND |
C. | NAND |
D. | XOR |
Answer» E. | |