MCQOPTIONS
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MCQOPTIONS
This section includes 9 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
WHAT_IS_RIPPLE_CARRY_ADDER??$ |
| A. | The carry output of the lower order stage is connected to the carry input of the next higher order stage |
| B. | The carry input of the lower order stage is connected to the carry output of the next higher order stage |
| C. | The carry output of the higher order stage is connected to the carry input of the next lower order stage |
| D. | None of the Mentioned |
| Answer» B. The carry input of the lower order stage is connected to the carry output of the next higher order stage | |
| 2. |
If minuend = 0, subtrahend = 1 and borrow input = 1 in a full subtractor then the borrow output will be:$ |
| A. | 0 |
| B. | 1 |
| C. | Not possible |
| D. | None of the Mentioned |
| Answer» C. Not possible | |
| 3. |
A D flip-flop is used in a 4-bit serial adder, why? |
| A. | It is used to invert the input of the full adder |
| B. | It is used to store the output of the full adder |
| C. | It is used to store the carry output of the full adder |
| D. | None of the Mentioned |
| Answer» D. None of the Mentioned | |
| 4. |
How many shift registers are used in a 4 bit serial adder? |
| A. | 4 |
| B. | 3 |
| C. | 2 |
| D. | 5 |
| Answer» D. 5 | |
| 5. |
In serial addition, the addition is carried out |
| A. | 3 bit per second |
| B. | Byte by byte |
| C. | Bit by bit |
| D. | None of the Mentioned |
| Answer» D. None of the Mentioned | |
| 6. |
What are carry generate combinations? |
| A. | If all the input are same then a carry is generated |
| B. | If all of the output are independent of the inputs |
| C. | If all of the input are dependent on the output |
| D. | None of the Mentioned |
| Answer» C. If all of the input are dependent on the output | |
| 7. |
The carry look ahead adder is based on the principle of looking at the lower order bits of ________ and ________ if a high order carry is generated. |
| A. | Addend, minuend |
| B. | Minuend, subtrahend |
| C. | Addend, minuend |
| D. | Augend, addend |
| Answer» E. | |
| 8. |
How many NOT gates are required to implement the Boolean expression: X = AB’C + A’BC?$ |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» B. 3 | |
| 9. |
One positive pulse with tw = 75 µs is applied to one of the inputs of an exclusive-OR circuit. A second positive pulse with tw = 15 µs is applied to the other input beginning 20 µs after the leading edge of the first pulse. Which statement describes the output’s relation with the inputs?$ |
| A. | The exclusive-OR output is a 20 s pulse followed by a 40 s pulse, with a separation of 15 s between the pulses |
| B. | The exclusive-OR output is a 20 s pulse followed by a 15 s pulse, with a separation of 40 s between the pulses |
| C. | The exclusive-OR output is a 15 s pulse followed by a 40 s pulse |
| D. | The exclusive-OR output is a 20 s pulse followed by a 15 s pulse, followed by a 40 s pulse |
| Answer» E. | |