MCQOPTIONS
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MCQOPTIONS
This section includes 116 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Science Engineering (CSE) knowledge and support exam preparation. Choose a topic below to get started.
| 51. |
What is the nominal range of Bluetooth? |
| A. | 1 km |
| B. | 10 m |
| C. | 1 m |
| D. | 10 km |
| Answer» C. 1 m | |
| 52. |
Which of the following specifies a set of media access control (MAC) and physical layer specifications for implementing WLANs? |
| A. | ieee 802.16 |
| B. | ieee 802.3 |
| C. | ieee 802.11 |
| D. | ieee 802.15 |
| Answer» D. ieee 802.15 | |
| 53. |
 Bluetooth operates in which band? |
| A. | ka band |
| B. | l band |
| C. | ku band |
| D. | 2.4 ghz ism band |
| Answer» E. | |
| 54. |
Which one of the following offers CPUs as integrated memory or peripheral interfaces? |
| A. | microcontroller |
| B. | microprocessor |
| C. | embedded system |
| D. | memory system |
| Answer» B. microprocessor | |
| 55. |
Which of the following offers external chips for memory and peripheral interface circuits? |
| A. | microcontroller |
| B. | microprocessor |
| C. | peripheral system |
| D. | embedded system |
| Answer» C. peripheral system | |
| 56. |
Which one of the following is the successor of 8086 and 8088 processor? |
| A. | 80386 |
| B. | 80286 |
| C. | 80288 |
| D. | 80388 |
| Answer» C. 80288 | |
| 57. |
Which of the following processor possess memory management? |
| A. | 80286 |
| B. | 80386 |
| C. | 8086 |
| D. | 8088 |
| Answer» B. 80386 | |
| 58. |
Beyond IP, UDP provides additional services such as _______ |
| A. | routing and switching |
| B. | sending and receiving of packets |
| C. | multiplexing and demultiplexing |
| D. | demultiplexing and error checking |
| Answer» E. | |
| 59. |
What kind of socket does an external EPROM to plugged in for prototyping? |
| A. | piggyback |
| B. | single socket |
| C. | multi-socket |
| D. | piggyback reset socket |
| Answer» B. single socket | |
| 60. |
Which is the single device capable of providing prototyping support for a range of microcontroller? |
| A. | rom |
| B. | umbrella device |
| C. | otp |
| D. | ram |
| Answer» C. otp | |
| 61. |
Which of the following can determine if two masters start to use the bus at the same time? |
| A. | counter detect |
| B. | collision detect |
| C. | combined format |
| D. | auto-incremental counter |
| Answer» C. combined format | |
| 62. |
Which among the below stated lines represent the handshaking variant usually and only controlled by the software in the handshaking process? |
| A. | xon/ xoff |
| B. | dcd & gnd |
| C. | txd & rxd |
| D. | Â all of the above |
| Answer» B. dcd & gnd | |
| 63. |
Which of the following provides an efficient method for transferring data from a peripheral to memory? |
| A. | dma controller |
| B. | serial port |
| C. | parallel port |
| D. | dual port |
| Answer» B. serial port | |
| 64. |
______ is a technology that allows telephone calls to be made over computer networks like the Internet. |
| A. | voip |
| B. | gsm |
| C. | modem |
| D. | cdma |
| Answer» B. gsm | |
| 65. |
Which types of an embedded systems involve the coding at a simple level in an embedded 'C', without any necessity of RTOS? |
| A. | sophisticated embedded systems |
| B. | medium scale embedded systems |
| C. | small scale embedded systems |
| D. | all of the above |
| Answer» D. all of the above | |
| 66. |
While designing an embedded system, which sub-task oriented process allocates the time steps for various modules that share the similar resources? |
| A. | simulation and validation |
| B. | iteration |
| C. | hardware-software partitioning |
| D. | scheduling |
| Answer» E. | |
| 67. |
Which development tool can facilitate the creation and modification of source programs in addition to assembly and higher -level languages? |
| A. | compiler |
| B. | linker |
| C. | assembler |
| D. | editor |
| Answer» E. | |
| 68. |
The step where in the results stored in the temporary register is transferred into the permanent register is called as ______ |
| A. | final step |
| B. | commitment step |
| C. | last step |
| D. | inception step |
| Answer» C. last step | |
| 69. |
Which of the following has a quadruple buffered receiver and a double buffered transmitter? |
| A. | intel 8250 |
| B. | 16450 |
| C. | 16550 |
| D. | mc68681 |
| Answer» E. | |
| 70. |
For applications that demand very high data-processing requirements, or if double precision floating point calculation is needed, then best choice will be |
| A. | cortex-m0 processor |
| B. | cortex-m3 processor |
| C. | cortex-m7 processor |
| D. | cortex-m0+ processor |
| Answer» D. cortex-m0+ processor | |
| 71. |
Which standard govern parallel communications? |
| A. | RS232 |
| B. | RS-232a |
| C. | CAT 5 |
| D. | IEEE 1284 |
| Answer» E. | |
| 72. |
Which abstraction level undergo the compilation process by converting a sequential program into finite-state machine and register transfers while designing an embedded system? |
| A. | system |
| B. | behaviour |
| C. | rt |
| D. | logic |
| Answer» C. rt | |
| 73. |
Which characteristics of an embedded system exhibit the responsiveness to the assortments or variations in system's environment by computing specific results for real-time applications without any kind of postponement ? |
| A. | single-functioned characteristic |
| B. | tightly-constraint characteristics |
| C. | reactive & real time characteristics |
| D. | all of the above |
| Answer» D. all of the above | |
| 74. |
How may standard levels of interrupts are provided on the 8-bit ISA bus (XT-class computer)? |
| A. | 4 |
| B. | 8 |
| C. | 12 |
| D. | 16 |
| Answer» C. 12 | |
| 75. |
The acronym HDI stands for: The acronym HDI stands for: |
| A. | Half duplex interface |
| B. | Hard disk |
| C. | Hard disk interface |
| D. | Help desk interference |
| Answer» D. Help desk interference | |
| 76. |
The best mode of connection between devices which need to send or receive large amounts of data over a short distance is _____ |
| A. | Bus |
| B. | Serial Port |
| C. | Parallel port |
| D. | Isochronous port |
| Answer» D. Isochronous port | |
| 77. |
______ is used as an intermediate to extend the processor BUS. |
| A. | Bridge |
| B. | Router |
| C. | Gateway |
| D. | Connector |
| Answer» B. Router | |
| 78. |
The system developed by IBM with ISA architecture is ______ |
| A. | SPARK |
| B. | SUN-SPARK |
| C. | PC-AT |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 79. |
The PCI BUS supports _____ address space/s. |
| A. | I/O |
| B. | Memory |
| C. | Configuration |
| D. | All of the mentioned |
| Answer» E. | |
| 80. |
The usual BUS structure used to connect the I/O devices is ___________ |
| A. | Star BUS structure |
| B. | Multiple BUS structure |
| C. | Single BUS structure |
| D. | Node to Node BUS structure |
| Answer» D. Node to Node BUS structure | |
| 81. |
The CPU hardware has a wire called __________ that the CPU senses after executing every instruction. |
| A. | interrupt request line |
| B. | interrupt bus |
| C. | interrupt receive line |
| D. | interrupt sense line |
| Answer» B. interrupt bus | |
| 82. |
The _________ determines the cause of the interrupt, performs the necessary processing and executes a return from the interrupt instruction to return the CPU to the execution state prior to the interrupt. |
| A. | interrupt request line |
| B. | device driver |
| C. | interrupt handler |
| D. | All of Above |
| Answer» D. All of Above | |
| 83. |
The method of accessing the I/O devices by repeatedly checking the status flags is ___________ |
| A. | Memory-mapped I/O |
| B. | Program-controlled I/O |
| C. | I/O mapped |
| D. | None of the mentioned |
| Answer» C. I/O mapped | |
| 84. |
The classification of BUSes into synchronous and asynchronous is based on __________ |
| A. | The devices connected to them |
| B. | The type of data transfer |
| C. | The Timing of data transfers |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 85. |
In synchronous BUS, the devices get the timing signals from __________ |
| A. | Timing generator in the device |
| B. | A common clock line |
| C. | The Timing of data transfers |
| D. | None of the mentioned |
| Answer» C. The Timing of data transfers | |
| 86. |
The transformation between the Parallel and serial ports is done with the help of ______ |
| A. | Flip flops |
| B. | Logic circuits |
| C. | Shift registers |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 87. |
Which of the following is the type of SPI controller? |
| A. | Queued SPI |
| B. | Microwire |
| C. | Microwire/plus |
| D. | Quad SPI |
| Answer» B. Microwire | |
| 88. |
The technique in which the CPU generates physical addresses directly is known as ____________ |
| A. | a) relocation register method |
| B. | b) real addressing |
| C. | virtual addressing |
| D. | none of the mentioned |
| Answer» C. virtual addressing | |
| 89. |
In rate monotonic scheduling ____________ |
| A. | a) shorter duration job has higher priority |
| B. | b) longer duration job has higher priority |
| C. | priority does not depend on the duration of the job |
| D. | none of the mentioned |
| Answer» B. b) longer duration job has higher priority | |
| 90. |
VxWorks is centered around ___________ |
| A. | a) wind microkernel |
| B. | b) linux kernel |
| C. | unix kernel |
| D. | none of the mentioned |
| Answer» B. b) linux kernel | |
| 91. |
 What is Event latency? |
| A. | a) the amount of time an event takes to occur from when the system started |
| B. | b) the amount of time from the event occurrence till the system stops |
| C. | the amount of time from event occurrence till the event crashes |
| D. | the amount of time that elapses from when an event occurs to when it is serviced. |
| Answer» E. | |
| 92. |
Real time systems need to __________ the interrupt latency. |
| A. | minimize |
| B. | maximize |
| C. | not bother about |
| D. | none of the mentioned |
| Answer» B. maximize | |
| 93. |
The most effective technique to keep dispatch latency low is to ____________ |
| A. | a) provide non preemptive kernels |
| B. | b) provide preemptive kernels |
| C. | make it user programmed |
| D. | run less number of processes at a time |
| Answer» C. make it user programmed | |
| 94. |
In a real time system the computer results ____________ |
| A. | a) must be produced within a specific deadline period |
| B. | b) may be produced at any time |
| C. | may be correct |
| D. | all of the mentioned |
| Answer» B. b) may be produced at any time | |
| 95. |
Earliest deadline first algorithm assigns priorities according to ____________ |
| A. | a) periods |
| B. | b) deadlines |
| C. | burst times |
| D. | none of the mentioned |
| Answer» C. burst times | |
| 96. |
In real time operating system ____________ |
| A. | a) all processes have the same priority |
| B. | b) a task must be serviced by its deadline period |
| C. | process scheduling can be done only once |
| D. | kernel is not required |
| Answer» C. process scheduling can be done only once | |
| 97. |
A process P1 has a period of 50 and a CPU burst of t1 = 25, P2 has a period of 80 and a CPU burst of 35. The total CPU utilization is ____________ |
| A. | a) 0.90 |
| B. | b) 0.74 |
| C. | 0.94 |
| D. | 0.80 |
| Answer» D. 0.80 | |
| 98. |
A process P1 has a period of 50 and a CPU burst of t1 = 25, P2 has a period of 80 and a CPU burst of 35., the priorities of P1 and P2 are? |
| A. | a) remain the same throughout |
| B. | b) keep varying from time to time |
| C. | may or may not be change |
| D. | none of the mentioned |
| Answer» C. may or may not be change | |
| 99. |
Using EDF algorithm practically, it is impossible to achieve 100 percent utilization due to __________ |
| A. | a) the cost of context switching |
| B. | b) interrupt handling |
| C. | power consumption |
| D. | all of the mentioned |
| Answer» B. b) interrupt handling | |
| 100. |
. In a real time system the computer results ____________ |
| A. | a) must be produced within a specific deadline period |
| B. | b) may be produced at any time |
| C. | may be correct |
| D. | all of the mentioned |
| Answer» B. b) may be produced at any time | |