1728 + Mcqs in Electronics Page 22 McqOptions

1051.	Inaccurate analog-to-digital conversion may be due to ____________.
A.	constant analog input voltage
B.	linear ramp usage
C.	intermittent counter inputs
D.	faulty sample-and-hold circuitry
Answer» E.

Discussion

1052.	A binary-weighted resistor used in a digital-to-analog converter (DAC) is only practical up to a resolution of ________.
A.	10 bits
B.	2 bits
C.	8 bits
D.	4 bits
Answer» E.

Discussion

1053.	A retriggerable one-shot has a pulse width of 10 ms; 3 ms after being triggered, another trigger pulse is applied. The resulting output pulse will be _________ ms.
A.	3
B.	7
C.	10
D.	13
Answer» E.

Discussion

1054.	Pulse-triggered flip-flops are also called _________ flip-flops.
A.	master-slave
B.	postponed
C.	level
D.	edge
Answer» B. postponed

Discussion

1055.	The key advantage of the successive approximation analog-to-digital converter (ADC) is its conversion speed.
A.	True
B.	False
Answer» B. False

Discussion

1056.	One way to determine the resolution of a digital-to-analog converter (DAC) is to compare the ratio of one step voltage to the maximum output voltage.
A.	True
B.	False
Answer» B. False

Discussion

1057.	In a binary-weighted digital-to-analog converter (DAC), the values of the input resistors are chosen to be proportional to the binary weights of the corresponding input bits.
A.	True
B.	False
Answer» C.

Discussion

1058.	An 8-bit digital-to-analog converter (DAC) has a resolution of 0.125 V.
A.	True
B.	False
Answer» C.

Discussion

1059.	For an S-R flip-flop to be SET or RESET, the respective input must be __________.
A.	LOW
B.	HIGH
C.	installed with steering diodes
D.	in parallel with a limiting resistor
Answer» C. installed with steering diodes

Discussion

1060.	One example of the use of an S-R flip-flop is as a(n) _________.
A.	racer
B.	binary storage register
C.	astable oscillator
D.	transition pulse generator
Answer» C. astable oscillator

Discussion

1061.	The toggle condition in a master-slave J-K flip-flop means that Q and will switch to their ________ state(s) at the _____________________.
A.	inverted, positive clock edge
B.	quiescent, negative clock edge
C.	opposite, active clock edge
D.	reset, synchronous clock edge
Answer» D. reset, synchronous clock edge

Discussion

1062.	If an input is activated by a signal transition, it is _____________.
A.	edge-triggered
B.	toggle-triggered
C.	clock-triggered
D.	noise-triggered
Answer» B. toggle-triggered

Discussion

1063.	A one-shot is a special type of multivibrator, which must be triggered to produce each output pulse.
A.	True
B.	False
Answer» B. False

Discussion

1064.	A D-type flip-flop is constructed by connecting an inverter between the Set and Clock terminals.
A.	True
B.	False
Answer» C.

Discussion

1065.	When using master-slave flip-flops, the data is entered into the flip-flop on the leading edge of the clock, but the output does not change until the trailing edge of the clock.
A.	True
B.	False
Answer» B. False

Discussion

1066.	is the algebraic expression for the duality theorem.
A.	True
B.	False
Answer» C.

Discussion

1067.	The associative law of addition states that A + (B + C) = (A + B) + C.
A.	True
B.	False
Answer» B. False

Discussion

1068.	The double-inversion rule states that if a variable is inverted twice, then the variable will be back to its original state.
A.	True
B.	False
Answer» B. False

Discussion

1069.	The S-R, D-type, and J-K flip-flops are all examples of _________________.
A.	astable multivibrators
B.	bistable multivibrators
C.	monostable multivibrators
D.	tristable multivibrators
Answer» C. monostable multivibrators

Discussion

1070.	Edge-triggered flip-flops must have _________.
A.	very fast response times
B.	at least two inputs to handle rising and falling edges
C.	a positive-transition pulse generator
D.	a negative-transition pulse generator
Answer» D. a negative-transition pulse generator

Discussion

1071.	An S-R flip-flop can be triggered by ______, ______, or ________.
A.	HIGHs, LOWs, PRESETs
B.	edges, levels, pulses
C.	HIGHs, LOWs, CLEARs
D.	SETs, RESETs, HIGHs
Answer» C. HIGHs, LOWs, CLEARs

Discussion

1072.	An S-R NAND latch with both of its inputs LOW has an output that is _____________.
A.	unpredictable
B.	floating
C.	HIGH
D.	LOW
Answer» B. floating

Discussion

1073.	________ analog-to-digital converters (ADCs) have a fixed value of conversion time that is not dependent on the value of the analog input.
A.	Substandard
B.	Dual
C.	Recessive approximation
D.	Successive approximation
Answer» E.

Discussion

1074.	The problems of the binary-weighted resistor digital-to-analog converter (DAC) can be overcome by using ___________.
A.	an 8-bit binary-weighted resistor DAC
B.	an R/2R ladder DAC
C.	a staircase DAC
D.	a flash DAC
Answer» C. a staircase DAC

Discussion

1075.	The number of binary bits at the input of a digital-to-analog converter (DAC) is known as ________.
A.	accuracy
B.	linearity
C.	resolution
D.	monotonicity
Answer» D. monotonicity

Discussion

1076.	A sample-and-hold circuit samples an analog value and holds it long enough for the analog-to-digital conversion to occur.
A.	True
B.	False
Answer» B. False

Discussion

1077.	Incorrect codes are a form of output error for a digital-to-analog converter (DAC).
A.	True
B.	False
Answer» C.

Discussion

1078.	To operate properly, an oscillator requires an external ac input signal.
A.	True
B.	False
Answer» C.

Discussion

1079.	For a Wien-bridge oscillator to produce a sustained sine-wave output, the phase shift around the positive feedback loop must be greater than 0 .
A.	True
B.	False
Answer» C.

Discussion

1080.	The effectiveness of a filter in rejecting signals beyond cutoff frequency is a function of the filter roll-off rating.
A.	True
B.	False
Answer» B. False

Discussion

1081.	A two-pole active filter produces a roll-off rate of 20 dB/decade.
A.	True
B.	False
Answer» C.

Discussion

1082.	A zero-level detector is a type of comparator circuit.
A.	True
B.	False
Answer» B. False

Discussion

1083.	If we double the number of bits in our digital representation of a number from 4 to 8 bits, we double the relative accuracy of the conversion from digital to analog.
A.	True
B.	False
Answer» C.

Discussion

1084.	The flash method of analog-to-digital conversion (ADC) uses comparators that compare reference voltages with the analog input voltage.
A.	True
B.	False
Answer» B. False

Discussion

1085.	A digital-to-analog converter (DAC) is said to be nonmonotonic if the magnitude of the output voltage increases every time the input code increases.
A.	True
B.	False
Answer» C.

Discussion

1086.	The 555 timer can be used in either the bistable mode or the monostable mode.
A.	True
B.	False
Answer» C.

Discussion

1087.	________ analog-to-digital converters (ADCs) use no clock signal, because there is no timing or sequencing required.
A.	Actuator
B.	Dual
C.	Flash
D.	Bipolar
Answer» D. Bipolar

Discussion

1088.	J-K flip-flops are often used as switch debouncers.
A.	True
B.	False
Answer» C.

Discussion

1089.	The J-K flip-flop eliminates the RACE state when both the J and K inputs are HIGH.
A.	True
B.	False
Answer» B. False

Discussion

1090.	Pulse-triggered flip-flops are identified by a bubble on the Q output terminal.
A.	True
B.	False
Answer» C.

Discussion

1091.	The Boolean expression for a three-input AND gate is Y = A B + C.
A.	True
B.	False
Answer» C.

Discussion

1092.	According to the commutative law, in ORing and ANDing of two variables, the order in which the variables are ORed or ANDed makes no difference.
A.	True
B.	False
Answer» B. False

Discussion

1093.	Boolean multiplication is symbolized by A + B.
A.	True
B.	False
Answer» C.

Discussion

1094.	The primary disadvantage of the flash analog-to digital converter (ADC) is that:
A.	it requires the input voltage to be applied to the inputs simultaneously
B.	a long conversion time is required
C.	a large number of output lines is required to simultaneously decode the input voltage
D.	a large number of comparators is required to represent a reasonable sized binary number
Answer» E.

Discussion

1095.	A binary-weighted digital-to-analog converter has a feedback resistor, Rf, of 12 k. If 50 A of current is through the resistor, the voltage out of the circuit is:
A.	0.6 V
B.	0.6 V
C.	0.1 V
D.	0.1 V
Answer» C. 0.1 V

Discussion

1096.	What is the major advantage of the R/2R ladder digital-to-analog (DAC), as compared to a binary-weighted digital-to-analog DAC converter?
A.	It only uses two different resistor values.
B.	It has fewer parts for the same number of inputs.
C.	Its operation is much easier to analyze.
D.	The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot.
Answer» B. It has fewer parts for the same number of inputs.

Discussion

1097.	The resolution of a 0 5 V 6-bit digital-to-analog converter (DAC) is:
A.	63%
B.	64%
C.	1.56%
D.	15.6%
Answer» D. 15.6%

Discussion

1098.	If both inputs of an S-R NAND latch are LOW, what will happen to the output?
A.	The output would become unpredictable.
B.	The output will toggle.
C.	The output will reset.
D.	No change will occur in the output.
Answer» B. The output will toggle.

Discussion

1099.	An astable multivibrator is a circuit that:
A.	has two stable states
B.	is free-running
C.	produces a continuous output signal
D.	is free-running and produces a continuous output signal
Answer» D. is free-running and produces a continuous output signal

Discussion

1100.	The truth table for an S-R flip-flop has how many VALID entries?
A.	3
B.	1
C.	4
D.	2
Answer» B. 1

Discussion

Explore topic-wise MCQs in Engineering.

Inaccurate analog-to-digital conversion may be due to ____________.

A binary-weighted resistor used in a digital-to-analog converter (DAC) is only practical up to a resolution of ________.

A retriggerable one-shot has a pulse width of 10 ms; 3 ms after being triggered, another trigger pulse is applied. The resulting output pulse will be _________ ms.

Pulse-triggered flip-flops are also called _________ flip-flops.

The key advantage of the successive approximation analog-to-digital converter (ADC) is its conversion speed.

One way to determine the resolution of a digital-to-analog converter (DAC) is to compare the ratio of one step voltage to the maximum output voltage.

In a binary-weighted digital-to-analog converter (DAC), the values of the input resistors are chosen to be proportional to the binary weights of the corresponding input bits.

An 8-bit digital-to-analog converter (DAC) has a resolution of 0.125 V.

For an S-R flip-flop to be SET or RESET, the respective input must be __________.

One example of the use of an S-R flip-flop is as a(n) _________.

The toggle condition in a master-slave J-K flip-flop means that Q and will switch to their ________ state(s) at the _____________________.

If an input is activated by a signal transition, it is _____________.

A one-shot is a special type of multivibrator, which must be triggered to produce each output pulse.

A D-type flip-flop is constructed by connecting an inverter between the Set and Clock terminals.

When using master-slave flip-flops, the data is entered into the flip-flop on the leading edge of the clock, but the output does not change until the trailing edge of the clock.

is the algebraic expression for the duality theorem.

The associative law of addition states that A + (B + C) = (A + B) + C.

The double-inversion rule states that if a variable is inverted twice, then the variable will be back to its original state.

The S-R, D-type, and J-K flip-flops are all examples of _________________.

Edge-triggered flip-flops must have _________.

An S-R flip-flop can be triggered by ______, ______, or ________.

An S-R NAND latch with both of its inputs LOW has an output that is _____________.

________ analog-to-digital converters (ADCs) have a fixed value of conversion time that is not dependent on the value of the analog input.

The problems of the binary-weighted resistor digital-to-analog converter (DAC) can be overcome by using ___________.

The number of binary bits at the input of a digital-to-analog converter (DAC) is known as ________.

A sample-and-hold circuit samples an analog value and holds it long enough for the analog-to-digital conversion to occur.

Incorrect codes are a form of output error for a digital-to-analog converter (DAC).

To operate properly, an oscillator requires an external ac input signal.

For a Wien-bridge oscillator to produce a sustained sine-wave output, the phase shift around the positive feedback loop must be greater than 0 .

The effectiveness of a filter in rejecting signals beyond cutoff frequency is a function of the filter roll-off rating.

A two-pole active filter produces a roll-off rate of 20 dB/decade.

A zero-level detector is a type of comparator circuit.

If we double the number of bits in our digital representation of a number from 4 to 8 bits, we double the relative accuracy of the conversion from digital to analog.

The flash method of analog-to-digital conversion (ADC) uses comparators that compare reference voltages with the analog input voltage.

A digital-to-analog converter (DAC) is said to be nonmonotonic if the magnitude of the output voltage increases every time the input code increases.

The 555 timer can be used in either the bistable mode or the monostable mode.

________ analog-to-digital converters (ADCs) use no clock signal, because there is no timing or sequencing required.

J-K flip-flops are often used as switch debouncers.

The J-K flip-flop eliminates the RACE state when both the J and K inputs are HIGH.

Pulse-triggered flip-flops are identified by a bubble on the Q output terminal.

The Boolean expression for a three-input AND gate is Y = A B + C.

According to the commutative law, in ORing and ANDing of two variables, the order in which the variables are ORed or ANDed makes no difference.

Boolean multiplication is symbolized by A + B.

The primary disadvantage of the flash analog-to digital converter (ADC) is that:

A binary-weighted digital-to-analog converter has a feedback resistor, Rf, of 12 k. If 50 A of current is through the resistor, the voltage out of the circuit is:

What is the major advantage of the R/2R ladder digital-to-analog (DAC), as compared to a binary-weighted digital-to-analog DAC converter?

The resolution of a 0 5 V 6-bit digital-to-analog converter (DAC) is:

If both inputs of an S-R NAND latch are LOW, what will happen to the output?

An astable multivibrator is a circuit that:

The truth table for an S-R flip-flop has how many VALID entries?

The toggle condition in a master-slave J-K flip-flop means that Q and will switch to their state(s) at the _____________.

An S-R flip-flop can be triggered by , , or ____.