

MCQOPTIONS
This section includes 135 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Science knowledge and support exam preparation. Choose a topic below to get started.
51. |
Tow s complement can be obtained from one s complement by |
A. | adding 1 |
B. | subtracting 1 |
C. | putting 1 as the leading bit |
D. | none of these |
Answer» B. subtracting 1 | |
52. |
Which code is a weighted code |
A. | Gray |
B. | Excess-3 |
C. | shift counter |
D. | 5111 |
Answer» E. | |
53. |
In binary system decimal 0.875 is represented by |
A. | 0.001 |
B. | 0.0 101 |
C. | 0.011 |
D. | 0.111 |
Answer» E. | |
54. |
The range for 13-bits complement numbers expressed in decimal is from |
A. | -127 to +128 |
B. | -127 to +127 |
C. | -128 to +128 |
D. | -128 to +127 |
Answer» C. -128 to +128 | |
55. |
The result of truncating the decimal number -22.56 is |
A. | -22 |
B. | -23 |
C. | 0 |
D. | -22.56 |
Answer» B. -23 | |
56. |
The decimal number 80 can be represented in BCD code as |
A. | 1000 0001 |
B. | 0101 0000 |
C. | 0010 0000 |
D. | 1000000 |
Answer» E. | |
57. |
The most commonly used character codes for transmission is |
A. | EBCDIC |
B. | ASCII |
C. | both |
D. | none of these |
Answer» E. | |
58. |
The range of the numbers which can be stored in an eight bit register is |
A. | -128 to +127 |
B. | -128 to + 128 |
C. | -999999+ +999999 |
D. | none of these |
Answer» B. -128 to + 128 | |
59. |
The decimal equivalent of binary number 0.0111 is |
A. | 4.375 |
B. | 0.4375 |
C. | 0.5375 |
D. | -0.4375 |
Answer» C. 0.5375 | |
60. |
The binary equivalent of the hexadecimal number 7BDis |
A. | 01111 0111101 |
B. | 111010111101 |
C. | 1011101111101 |
D. | all of these |
Answer» B. 111010111101 | |
61. |
The octal equivalent of 111 010 is |
A. | 81 |
B. | 72 |
C. | 71 |
D. | all of these |
Answer» C. 71 | |
62. |
The binary equivalent of the octal Numbers 13.54 is |
A. | 1011.1011 |
B. | 1101.1110 |
C. | 1001.1110 |
D. | all of these |
Answer» C. 1001.1110 | |
63. |
Binary coded decimal (BCD) numbers express each digit as a |
A. | byte |
B. | nibble |
C. | bit |
D. | all of these |
Answer» C. bit | |
64. |
Which of the following is true about BCD |
A. | It is a 8-4-2-1 weighted code |
B. | (1234567)10 needs 4 bytes in BCD representatoion |
C. | conversion to and from the decimal system can be done easily |
D. | All of these |
Answer» E. | |
65. |
Which of the following 4 bit combination are invaliid in the BCD code |
A. | 0010 |
B. | 0101 |
C. | 1000 |
D. | 1010 |
Answer» C. 1000 | |
66. |
Decimal number 5 in level parity self correcting code is |
A. | 10000 |
B. | 01011 |
C. | 01100 |
D. | 00101 |
Answer» C. 01100 | |
67. |
A circuit produces I s complement of the input word one application is binary subtrction Tt is called |
A. | logic gate |
B. | register |
C. | multiplexes |
D. | controlled inverter |
Answer» C. multiplexes | |
68. |
Booth s coding in 8 bits for the decimal number -57 is |
A. | 0-100+1000 |
B. | 0-100+100-1 |
C. | 0-1+100-10 +1 |
D. | 00-10 +100-1 |
Answer» C. 0-1+100-10 +1 | |
69. |
The expression for sum of A B in the halp adder is given by |
A. | AB |
B. | A+B |
C. | A+B |
D. | none of these |
Answer» D. none of these | |
70. |
In 2s complement reoeesentation a certain negative -Ni is 1011 the representation of +Ni is |
A. | 0100 |
B. | 0101 |
C. | 0110 |
D. | 0011 |
Answer» D. 0011 | |
71. |
The weight which makes the complement operation easier in BCD form is |
A. | 8-4-2-1 |
B. | Excess -3 |
C. | 2-4-2-1 |
D. | 3-2-1-0 |
Answer» D. 3-2-1-0 | |
72. |
A logic circuit which is used to change a BCD number into an equivalent decimal number is |
A. | decoder |
B. | encoder |
C. | multiplexer |
D. | code converter |
Answer» B. encoder | |
73. |
A decimal number has 25 digitals The number of bits needed for its equivalent binary representation is approximately |
A. | 50 |
B. | 60 |
C. | 75 |
D. | 80 |
Answer» D. 80 | |
74. |
The 2 s complement representatation of (-539)10 in hexadecimal is |
A. | ABC |
B. | DBC |
C. | DE5 |
D. | 9E7 |
Answer» D. 9E7 | |
75. |
Sign extension is a step in |
A. | floating point multiplication |
B. | signed 16 bit integer addition |
C. | arithmetic left shift |
D. | converting a signed integer from one size to another |
Answer» B. signed 16 bit integer addition | |
76. |
A mod -2 counter followed by a mod -5 counter is |
A. | same as a mode -5 counter followed by a mod-2 counter |
B. | a decade counter |
C. | a mod-7 counter |
D. | none of these |
Answer» B. a decade counter | |
77. |
The dynamic hazard problem occurs in |
A. | combinational circuit alone |
B. | sequential circuit only |
C. | both (a) and (b) |
D. | none of these |
Answer» D. none of these | |
78. |
A ring counter same as |
A. | up -down counter |
B. | parallel -counter |
C. | shift register |
D. | none of these |
Answer» D. none of these | |
79. |
A 2 bit binary multiplier can be implemented using |
A. | 2 input ANDs only |
B. | 2input XORs and 4 input AND gates only |
C. | 2 input NORs and one XNOR gate |
D. | XOR gates and shift registers |
Answer» C. 2 input NORs and one XNOR gate | |
80. |
A pulse train can be delayed by a finite number of clock periods using |
A. | a serial-in serial-out shift register |
B. | a serial-in parallel -out shift register |
C. | a parallel-in serial-out shift register |
D. | a parallel-in parallel -out shift register |
Answer» E. | |
81. |
How many illegitimate states has synchronous mod-6 counter ? |
A. | 3 |
B. | 2 |
C. | 1 |
D. | 0 |
Answer» B. 2 | |
82. |
A J K flip flop has its Jinput connected to logic level 1 and its input to the q output pulse is fed to its clock input to the flip flop will now |
A. | change its state at each clock pulse |
B. | go to stste 1 and stay there |
C. | go to state 0 and sty there |
D. | retain its previous state |
Answer» B. go to stste 1 and stay there | |
83. |
The astable multivibrator has |
A. | two quasi stable states |
B. | two stable states |
C. | one stable and one quasi-stable state |
D. | none of these |
Answer» B. two stable states | |
84. |
When a large number of analog signals are to be converted an analog multiplexer is used. In this case most suitable A.D. converter will be |
A. | up down counter type |
B. | dual stop type |
C. | forward counter type |
D. | successive approximation type |
Answer» E. | |
85. |
A stable multivibrator are used as |
A. | comparator circuit |
B. | squaring circuit |
C. | frequency to voltage converter |
D. | voltage to frequency converter |
Answer» B. squaring circuit | |
86. |
The flip -flops which operate in synchronism with external clock pulses are known as |
A. | synchronous flip flop |
B. | asynchronous flip -flop |
C. | either of the above |
D. | none of these |
Answer» B. asynchronous flip -flop | |
87. |
With the use of an electronic counter six capsules are to be filled in bottles automatically. In such a counter what will be the number of flip-flops required ? |
A. | 3 |
B. | 4 |
C. | 6 |
D. | 8 |
Answer» D. 8 | |
88. |
To build a mod-19 counter the number of flip-flop required is |
A. | 3 |
B. | 5 |
C. | 7 |
D. | 8 |
Answer» C. 7 | |
89. |
In a digital counter circuit feedback loop is introduced to |
A. | improve distortion |
B. | improve stability |
C. | reduce the number of input pulses to reset the counter |
D. | synchronous input and output pulses |
Answer» D. synchronous input and output pulses | |
90. |
Which of the following flip-flop is free from race-around problem ? |
A. | Q flip-flop |
B. | T flip-flop |
C. | SR flip-flop |
D. | Master-slave JK flip-flop |
Answer» E. | |
91. |
The clear data and present input of the JK flip-flop are known as |
A. | synchronous inputs |
B. | directed inputs |
C. | either (a) or (b) |
D. | indirect inputs |
Answer» D. indirect inputs | |
92. |
If the input J is connected through K input of J-K, then flip-flop will behave as a |
A. | D type flip-flop |
B. | T type flip-flop |
C. | S-R flip-flop |
D. | Toggle switch |
Answer» D. Toggle switch | |
93. |
The ring countre is analogous to |
A. | toggle switch |
B. | latch |
C. | stepping switch |
D. | S-R flip flop |
Answer» E. | |
94. |
Which of the following unit will choose to transform decimal number to binary code ? |
A. | Encoder |
B. | Decoder |
C. | Multiplexer |
D. | Demultiplexer |
Answer» D. Demultiplexer | |
95. |
If a clock with time period 'T' is used with n stage shift register, then output of final stage will be delayed by |
A. | nT sec |
B. | (n-1 )T sec |
C. | n/T sec |
D. | (2n-1) T sec |
Answer» E. | |
96. |
The main difference between JK and RS flip-flop is that |
A. | JK flip does not need a clock pulse |
B. | there is a feedback in JK flip-flop |
C. | JK flip-flop accepts both inputs as 1 |
D. | JK flip-flop is acronym of junction cathode multivibrator |
Answer» B. there is a feedback in JK flip-flop | |
97. |
IT is diffcult to design asynhronous sequential circuit because |
A. | externalt clock is to be provided |
B. | it is more compex |
C. | memory required is enormous |
D. | generally they involve stability problem |
Answer» B. it is more compex | |
98. |
It is difficult to design asynhronus sequential circuit because |
A. | external clock is to be provided |
B. | it is more complex |
C. | memory required is enormous |
D. | generally they involve stability problem |
Answer» B. it is more complex | |
99. |
For which of the following flip-flops, the output is clearly defined for all combinations of two inputs ? |
A. | Q type flip-flop |
B. | R-S flip-flop |
C. | J-K flip-flop |
D. | T flip-flop |
Answer» E. | |
100. |
Register is a |
A. | set of capacitor used to register input instructions in a digital computer |
B. | set of paper tapes and car s put in a file |
C. | temporary storage unit within the CPU having dedicated or general purpose use |
D. | part of the auxiliary memory |
Answer» E. | |