MCQOPTIONS
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MCQOPTIONS
This section includes 10 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Fan-in and Fan-out are the characteristics of ___________ |
| A. | Registers |
| B. | Logic families |
| C. | Sequential Circuits |
| D. | Combinational Circuits |
| Answer» C. Sequential Circuits | |
| 2. |
Depending upon the flow of current from the output of one logic circuit to the input of another the logic families can be divides into _________ categories. |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» B. 3 | |
| 3. |
The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as __________ |
| A. | Noise Margin |
| B. | Noise Immunity |
| C. | White Noise |
| D. | Signal to Noise Ratio |
| Answer» C. White Noise | |
| 4. |
Fan-in is defined as __________ |
| A. | the number of outputs connected to gate without any degradation in the voltage levels |
| B. | the number of inputs connected to gate without any degradation in the voltage levels |
| C. | the number of outputs connected to gate with degradation in the voltage levels |
| D. | the number of inputs connected to gate with degradation in the voltage levels |
| Answer» C. the number of outputs connected to gate with degradation in the voltage levels | |
| 5. |
Power Dissipation in DIC is expressed in __________ |
| A. | Watts or kilowatts |
| B. | Milliwatts or nanowatts |
| C. | DB |
| D. | Mdb |
| Answer» C. DB | |
| 6. |
The delay times are measured between the __________ % voltage levels of the input and output waveforms. |
| A. | 50 |
| B. | 75 |
| C. | 25 |
| D. | 100 |
| Answer» B. 75 | |
| 7. |
Propagation delay times can be divided as __________ |
| A. | t(PLH) and t(LPH) |
| B. | t(LPH) and t(PHL) |
| C. | t(PLH) and t(PHL) |
| D. | t(HPL) and t(LPH) |
| Answer» D. t(HPL) and t(LPH) | |
| 8. |
Propagation delay is defined as __________ |
| A. | the time taken for the output of a gate to change after the inputs have changed |
| B. | the time taken for the input of a gate to change after the outputs have changed |
| C. | the time taken for the input of a gate to change after the intermediates have changed |
| D. | the time taken for the output of a gate to change after the intermediates have changed |
| Answer» B. the time taken for the input of a gate to change after the outputs have changed | |
| 9. |
CMOS refers to __________ |
| A. | Continuous Metal Oxide Semiconductor |
| B. | Complementary Metal Oxide Semiconductor |
| C. | Centred Metal Oxide Semiconductor |
| D. | Concrete Metal Oxide Semiconductor |
| Answer» C. Centred Metal Oxide Semiconductor | |
| 10. |
MOS families includes __________ |
| A. | PMOS and NMOS |
| B. | CMOS and NMOS |
| C. | PMOS, NMOS and CMOS |
| D. | EMOS, NMOS and PMOS |
| Answer» D. EMOS, NMOS and PMOS | |