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This section includes 657 Mcqs, each offering curated multiple-choice questions to sharpen your Testing Subject knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The simplified form of . |
| A. | True |
| B. | False |
| Answer» C. | |
| 2. |
The carry output of each adder in a ripple adder provides an additional sum output bit. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 3. |
A good rule of thumb for determining the pin numbers of dual-in-line package IC chips would be to place the notch to your right and pin #1 will always be in the lower right corner. |
| A. | True |
| B. | False |
| Answer» C. | |
| 4. |
Shift registers are used to store and transfer data. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 5. |
The modulus of a counter is the actual number of states in its sequence. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 6. |
The concept of a counter to implement a digital one-shot using HDL is not used. |
| A. | True |
| B. | False |
| Answer» C. | |
| 7. |
All flip-flops in an asynchronous counter change states at the same time. |
| A. | True |
| B. | False |
| Answer» C. | |
| 8. |
A glitch is a short pulse resulting in an undesired result in a digital circuit. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 9. |
The counter circuit and associated waveforms shown below are for a(n) ________ counter, and the correct output waveform for QB is shown by waveform ________. |
| A. | synchronous, a |
| B. | asynchronous, b |
| C. | synchronous, c |
| D. | asynchronous, d |
| Answer» D. asynchronous, d | |
| 10. |
Asynchronous counters are often called ________ counters. |
| A. | toggle |
| B. | ripple |
| C. | binary |
| D. | flip-flop |
| Answer» C. binary | |
| 11. |
The given circuit is a(n) ________. |
| A. | three-bit synchronous binary counter |
| B. | eight-bit asynchronous binary flip-flop |
| C. | two-bit asynchronous binary counter |
| D. | four-bit asynchronous binary counter |
| Answer» E. | |
| 12. |
Three cascaded modulus-10 counters have an overall modulus of 1000. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 13. |
A reliable method for eliminating decoder spikes is to use strobing. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 14. |
An asynchronous counter differs from a synchronous counter in the method of clocking. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 15. |
The terminal count of a typical modulus-10 binary counter is 1010. |
| A. | True |
| B. | False |
| Answer» C. | |
| 16. |
One characteristic of a ring counter is that the modulus is equal to the number of flip-flops in the register and, consequently, there are never any unused or invalid states. |
| A. | True |
| B. | False |
| Answer» C. | |
| 17. |
In a full-featured counter in HDL, the concept of rolling over simply means the count sequence has reached its limit and must start over at the beginning of the sequence. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 18. |
The 7447 has a 4-bit BCD input, seven individual active-LOW outputs, and a ripple blanking input and output. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 19. |
Dependency notation is no longer used. |
| A. | True |
| B. | False |
| Answer» C. | |
| 20. |
Asynchronous counters are known as modulus counters. |
| A. | True |
| B. | False |
| Answer» C. | |
| 21. |
To cascade is to connect in parallel. |
| A. | True |
| B. | False |
| Answer» C. | |
| 22. |
Cascade means to connect the Q output of one flip-flop to the clock input of the next. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 23. |
In a synchronous counter, each state is clocked by the same pulse. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 24. |
Basic counters can be cascaded in parallel to increase the number of data bits that the counter can handle. |
| A. | True |
| B. | False |
| Answer» C. | |
| 25. |
In a 74192 BCD decade up-/down-counter, the terminal count up and the terminal count down are active-LOW. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 26. |
All decade counters are BCD counters. |
| A. | True |
| B. | False |
| Answer» C. | |
| 27. |
Shift register counters use logic functions to reset the registers when the desired count is reached. |
| A. | True |
| B. | False |
| Answer» C. | |
| 28. |
Generally speaking, the synchronous counter requires more circuitry than an asynchronous counter. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 29. |
A parallel in/serial out shift register enters all data bits simultaneously and transfers them out one bit at a time. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 30. |
Another term used to describe up/down counters is bidirectional. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 31. |
When implementing a complete system application using IC counter chips, output devices such as LED indicators must be configured to operate from the counter outputs. |
| A. | True |
| B. | False |
| Answer» C. | |
| 32. |
Bidirectional shift registers can shift data either right or left. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 33. |
A state diagram is a table of states. |
| A. | True |
| B. | False |
| Answer» C. | |
| 34. |
A ripple counter is an asynchronous counter. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 35. |
In a multiplexer, the data select control inputs are responsible for determining which data input is selected to be transmitted to the data output line. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 36. |
Before you can make a design you must decide if you want an active-HIGH output. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 37. |
The microcontroller needs to use only three input lines to monitor eight separate points. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 38. |
A BCD is used for communication between a computer and a human being because it is too easy to deal with arithmetically. |
| A. | True |
| B. | False |
| Answer» C. | |
| 39. |
A demultiplexer takes a dual input data value and routes it to one of several outputs. |
| A. | True |
| B. | False |
| Answer» C. | |
| 40. |
Digital systems have ________. |
| A. | one state |
| B. | two states |
| C. | three states |
| D. | four states |
| Answer» C. three states | |
| 41. |
Digital systems are called ________. |
| A. | binary systems |
| B. | logic systems |
| C. | numbering systems |
| D. | ADC systems |
| Answer» C. numbering systems | |
| 42. |
1/4 as a binary number would be ________. |
| A. | 0.01 |
| B. | 0.11 |
| C. | 0.10 |
| D. | 0.00 |
| Answer» B. 0.11 | |
| 43. |
The voltage levels used to represent binary values (0 and 1) in a digital system are nearly equal in value. |
| A. | True |
| B. | False |
| Answer» C. | |
| 44. |
In a serial data system, the data is transmitted along a group of conductors simultaneously. |
| A. | True |
| B. | False |
| Answer» C. | |
| 45. |
Temperature variation is normally an analog quantity. |
| A. | True |
| B. | False |
| Answer» B. False | |
| 46. |
The MOD number of a Johnson counter will always be equal to one-half the number of flip-flops in the counter. |
| A. | True |
| B. | False |
| Answer» C. | |
| 47. |
The invalid range for an input to TTL logic is from ________. |
| A. | 0 to 0.8 V |
| B. | 1.2 to 1.6 V |
| C. | 0.8 to 2.0 V |
| D. | 2.0 to 5.0 V |
| Answer» D. 2.0 to 5.0 V | |
| 48. |
The column weight of the "1" in the hexadecimal number 1AB is ________. |
| A. | 64 |
| B. | 256 |
| C. | 512 |
| D. | 1024 |
| Answer» C. 512 | |
| 49. |
The 2's complement of the binary number 1000 is ________. |
| A. | 111 |
| B. | 0110 |
| C. | 1110 |
| D. | 1000 |
| Answer» E. | |
| 50. |
The MSB of 11001 is ________. |
| A. | 1 |
| B. | 1100 |
| C. | C |
| D. | 19 |
| E. | <sub>16</sub> |
| Answer» B. 1100 | |