MCQOPTIONS
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MCQOPTIONS
This section includes 950 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Science Engineering (CSE) knowledge and support exam preparation. Choose a topic below to get started.
| 251. |
User-visible registers enable the machine or programmer to |
| A. | Minimize Compiler |
| B. | Minimize Register |
| C. | Minimize Control |
| D. | Minimize Main Memory usage |
| Answer» E. | |
| 252. |
The unit of data exchange between cache and main memory is known as |
| A. | Cache Memory |
| B. | Cache Size |
| C. | Block Size |
| D. | Mapping Function |
| Answer» D. Mapping Function | |
| 253. |
Which registers can interact with the secondary storage ? |
| A. | MAR |
| B. | PC |
| C. | IR |
| D. | R0 |
| Answer» B. PC | |
| 254. |
The time delay between two successive initiation of memory operation _______ . |
| A. | Memory access time |
| B. | Memory search time |
| C. | Memory cycle time |
| D. | Instruction delay |
| Answer» D. Instruction delay | |
| 255. |
______ is generally used to increase the apparent size of physical memory . |
| A. | Secondary memory |
| B. | Virtual memory |
| C. | Hard-disk |
| D. | Disks |
| Answer» C. Hard-disk | |
| 256. |
To reduce the memory access time we generally make use of ______ . |
| A. | Heaps |
| B. | Higher capacity RAM’s |
| C. | SDRAM’s |
| D. | Cache’s |
| Answer» E. | |
| 257. |
Which of the register/s of the processor is/are connected to Memory Bus ? |
| A. | PC |
| B. | MAR |
| C. | IR |
| D. | Both a and b |
| Answer» C. IR | |
| 258. |
The I/O interface required to connect the I/O device to the bus consists of ______ |
| A. | Address decoder and registers |
| B. | Control circuits |
| C. | Both a and b |
| D. | Only b |
| Answer» D. Only b | |
| 259. |
A privilege exception is raised, |
| A. | When a process tries to change the mode of the system |
| B. | When a process tries to change the piority level of the other processes |
| C. | When a process tries to access the memory allocated to other user |
| D. | All of the above |
| Answer» E. | |
| 260. |
Computer A having clock cycle time of 250 ps and cycle per instruction of 2.0 for some programs, and computer B having clock cycle time of 500 ps and a cycle per instruction of 1.2 for the same program. Which one is faster for this program |
| A. | Computer A |
| B. | Computer B |
| C. | Both will have same time |
| D. | None of the above |
| Answer» B. Computer B | |
| 261. |
When the PC having Clock rate of 2 and the CPU clock cycle for a program is 4 then Execution time of this computer for a program will be |
| A. | 1 |
| B. | 1.5 |
| C. | 1.75 |
| D. | 2 |
| Answer» E. | |
| 262. |
The procedure when call procedure that has been called, saving the registers it wants for using, when the caller has been left unrestrained, is known as |
| A. | Caller saving |
| B. | Calls |
| C. | Callee saving |
| D. | Jumps |
| Answer» D. Jumps | |
| 263. |
The decoded instruction is stored in ______ . |
| A. | IR |
| B. | PC |
| C. | Registers |
| D. | MDR |
| Answer» B. PC | |
| 264. |
Way in which computer components are connected with each another is called |
| A. | computer layout |
| B. | computer architecture |
| C. | computer parts |
| D. | computer hardware |
| Answer» C. computer parts | |
| 265. |
Which of the following affects processing power? |
| A. | Data bus capacity |
| B. | Addressing scheme |
| C. | Clock speed |
| D. | All of the above |
| Answer» E. | |
| 266. |
________________ organization is essentially an array of selectively open and closed unidirectional contacts. |
| A. | ROM |
| B. | RAM |
| C. | Computer |
| D. | All of the above |
| Answer» B. RAM | |
| 267. |
Processor-I/O involves data transferring between |
| A. | Computers |
| B. | Processor and I/O modules |
| C. | Registers |
| D. | User Processes |
| Answer» C. Registers | |
| 268. |
Data and instructions that are being used frequently are stored in |
| A. | Cache |
| B. | Block |
| C. | hard disk |
| D. | main memory |
| Answer» C. hard disk | |
| 269. |
Data register can be assigned to a |
| A. | Variety of Functions |
| B. | Variety of Devices |
| C. | Variety of Programs |
| D. | Variety of systems |
| Answer» B. Variety of Devices | |
| 270. |
I/O instruction Status tests various |
| A. | Control Conditions |
| B. | Status conditions |
| C. | I/O device |
| D. | Memory |
| Answer» C. I/O device | |
| 271. |
PerformanceX = 1/ Execution Time x the given relation shows that |
| A. | Performance is increased when execution time is decreased |
| B. | Performance is increased when execution time is increased |
| C. | Performance is decreased when execution time is decreased |
| D. | None |
| Answer» B. Performance is increased when execution time is increased | |
| 272. |
The _______________ of the desired memory location is applied to the address input terminals. |
| A. | Name |
| B. | Address |
| C. | Number |
| D. | Level |
| Answer» C. Number | |
| 273. |
The instruction -> Add LOCA,R0 does, |
| A. | Adds the value of LOCA to R0 and stores in the temp register |
| B. | Adds the value of R0 to the address of LOCA |
| C. | Adds the values of both LOCA and R0 and stores it in R0 |
| D. | Adds the value of LOCA with a value in accumulator and stores it in R0 |
| Answer» D. Adds the value of LOCA with a value in accumulator and stores it in R0 | |
| 274. |
Graph coloring gives best results, when there are at-least |
| A. | 16 general-purpose registers |
| B. | 24 general-purpose registers |
| C. | 32 general-purpose registers |
| D. | 64 general-purpose registers |
| Answer» B. 24 general-purpose registers | |
| 275. |
The EPROM eraser will emit________________ light. |
| A. | Fluorescent |
| B. | LED |
| C. | Laser |
| D. | UV |
| Answer» E. | |
| 276. |
Branch instruction is also known as |
| A. | jump instruction |
| B. | logical instruction |
| C. | arithmetic instruction |
| D. | programmed instructions |
| Answer» B. logical instruction | |
| 277. |
Branch instruction 'JUMP TO SUBORDINATE' is an example of |
| A. | unconditional branch |
| B. | arithmetic branch |
| C. | transferring branch |
| D. | conditional branch |
| Answer» B. arithmetic branch | |
| 278. |
I/O instruction Transfer used to read the |
| A. | Data |
| B. | Information |
| C. | Instructions |
| D. | Description |
| Answer» B. Information | |
| 279. |
The High level language, referred as human language, is converted into the computer instructions via |
| A. | Compiler |
| B. | Interpreter |
| C. | Hardware system |
| D. | Software system |
| Answer» C. Hardware system | |
| 280. |
Two main types of branch instructions are |
| A. | conditional branch |
| B. | unconditional branch |
| C. | logical branch |
| D. | both a and b |
| Answer» E. | |
| 281. |
In data processing, processor perform some |
| A. | Arithmetic or logic operation on information |
| B. | Arithmetic or logic operation on instruction |
| C. | Arithmetic or logic operation on programs |
| D. | Arithmetic or logic operation on data |
| Answer» E. | |
| 282. |
Basic unit of computer is |
| A. | ALU |
| B. | CU |
| C. | I/O unit |
| D. | all of these |
| Answer» E. | |
| 283. |
Condition codes are bits typically set by the |
| A. | Processor execution |
| B. | processor operation |
| C. | Processor hardware |
| D. | Processor software |
| Answer» D. Processor software | |
| 284. |
The internal Components of the processor are connected by _______ . |
| A. | Processor intra-connectivity circuitry |
| B. | Processor bus |
| C. | Memory bus |
| D. | Rambus |
| Answer» C. Memory bus | |
| 285. |
Data moved between computer components through |
| A. | I/O Processor |
| B. | I/O Modules |
| C. | I/O Devices |
| D. | I/O Buffers |
| Answer» C. I/O Devices | |
| 286. |
A first goal of compiler writer |
| A. | Correctness |
| B. | Fast performance |
| C. | Callee saving |
| D. | Data dependence |
| Answer» B. Fast performance | |
| 287. |
When a logic circuit diagram is given, you can analyse the circuit to obtain the _____________. |
| A. | Result |
| B. | Input |
| C. | Logic Expression |
| D. | None of the above |
| Answer» D. None of the above | |
| 288. |
In a sequential memory, the words are stored in and out in a sequence. |
| A. | Write |
| B. | Read |
| C. | Write/Read |
| D. | All of the above |
| Answer» C. Write/Read | |
| 289. |
If the instruction, Add R1,R2,R3 is executed in a system which is pipe-lined, then the value of S is (Where S is term of the Basic performance equation) |
| A. | 3 |
| B. | ~2 |
| C. | ~1 |
| D. | 6 |
| Answer» D. 6 | |
| 290. |
In Breakpoint mode of operation, |
| A. | The program is interrupted after each detection |
| B. | The program will not be stopped and the errors are sorted out after the complete program is scanned |
| C. | There is no effect on the program, i.e the program is executed without rectification of errors |
| D. | The program is alted only at specific points |
| Answer» E. | |
| 291. |
The programs which are used for translating the symbolic-language into the machine-language are |
| A. | Compiler |
| B. | Assemblers |
| C. | Interpreters |
| D. | All above |
| Answer» C. Interpreters | |
| 292. |
One of the complex jobs of the compiler writer, is to figure-out what instruction sequence will be used best for each segment, named as |
| A. | Simplify trade-offs among alternatives |
| B. | Stack height reduction |
| C. | Local optimizations |
| D. | Jumps |
| Answer» B. Stack height reduction | |
| 293. |
The average number of steps taken to execute the set of instructions can be made to be less than one by following _______ . |
| A. | ISA |
| B. | Pipe-lining |
| C. | Super-scaling |
| D. | Sequential |
| Answer» D. Sequential | |
| 294. |
Computer bus which moves data between the central processor and memory is called |
| A. | I/O bus |
| B. | CPU bus |
| C. | processor bus |
| D. | data bus |
| Answer» E. | |
| 295. |
Which of the following are examples of input devices? |
| A. | Visual display unit, dot matrix printer, laser printer |
| B. | Keyboard, mouse, and optical mark reader |
| C. | Arithmetic and logic unit, the control unit |
| D. | RAM, ROM, PROM |
| Answer» C. Arithmetic and logic unit, the control unit | |
| 296. |
Computer bus which allows the processor to communicate with peripheral devices is |
| A. | expansion bus |
| B. | system bus |
| C. | memory bus |
| D. | processor bus |
| Answer» B. system bus | |
| 297. |
Type of computer bus which connects the CPU to a memory on the system board is |
| A. | system bus |
| B. | word bus |
| C. | expansion bus |
| D. | width bus |
| Answer» B. word bus | |
| 298. |
Synchronous means _______ |
| A. | At irregular intervals |
| B. | At same time |
| C. | At variable time |
| D. | None of these |
| Answer» C. At variable time | |
| 299. |
Control and Status registers used by the processor to control |
| A. | Design of the Processor |
| B. | Operation of the Processor |
| C. | Speed of the Processor |
| D. | Execution of the Processor |
| Answer» C. Speed of the Processor | |
| 300. |
A+B in assembly language will be written as |
| A. | add AB |
| B. | addition AB |
| C. | add A,B |
| D. | addition A,B |
| Answer» D. addition A,B | |