MCQOPTIONS
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MCQOPTIONS
This section includes 657 Mcqs, each offering curated multiple-choice questions to sharpen your Testing Subject knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The controller is connected to the |
| A. | processor bus |
| B. | system bus |
| C. | external bus |
| D. | none of the mentioned |
| Answer» C. external bus | |
| 2. |
When the R/W bit of the status register of the DMA controller is set to 1. |
| A. | read operation is performed |
| B. | write operation is performed |
| C. | read & write operation is performed |
| D. | none of the mentioned |
| Answer» B. write operation is performed | |
| 3. |
After the completion of the DMA transfer, the processor is notified by |
| A. | acknowledge signal |
| B. | interrupt signal |
| C. | wmfc signal |
| D. | none of the mentioned |
| Answer» C. wmfc signal | |
| 4. |
Can a single DMA controller perform operations on two different disks simultaneously? |
| A. | true |
| B. | false |
| Answer» B. false | |
| 5. |
In DMA transfers, the required signals and addresses are given by the |
| A. | processor |
| B. | device drivers |
| C. | dma controllers |
| D. | the program itself |
| Answer» D. the program itself | |
| 6. |
The DMA differs from the interrupt mode by |
| A. | the involvement of the processor for the operation |
| B. | the method of accessing the i/o devices |
| C. | the amount of data transfer possible |
| D. | none of the mentioned |
| Answer» E. | |
| 7. |
How is a privilege exception dealt with? |
| A. | the program is halted and the system switches into supervisor mode and restarts the program execution |
| B. | the program is stopped and removed from the queue |
| C. | the system switches the mode and starts the execution of a new process |
| D. | the system switches mode and runs the debugger |
| Answer» B. the program is stopped and removed from the queue | |
| 8. |
The instructions which can be run only supervisor mode are? |
| A. | non-privileged instructions |
| B. | system instructions |
| C. | privileged instructions |
| D. | exception instructions |
| Answer» D. exception instructions | |
| 9. |
The DMA transfers are performed by a control circuit called as |
| A. | device interface |
| B. | dma controller |
| C. | data controller |
| D. | overlooker |
| Answer» C. data controller | |
| 10. |
In trace mode of operation is |
| A. | the program is interrupted after each detection |
| B. | the program will not be stopped and the errors are sorted out after the complete program is scanned |
| C. | there is no effect on the program, i.e the program is executed without rectification of errors |
| D. | the program is halted only at specific points |
| Answer» B. the program will not be stopped and the errors are sorted out after the complete program is scanned | |
| 11. |
What are the different modes of operation of a computer? |
| A. | user and system mode |
| B. | user and supervisor mode |
| C. | supervisor and trace mode |
| D. | supervisor, user and trace mode |
| Answer» C. supervisor and trace mode | |
| 12. |
The two facilities provided by the debugger is |
| A. | trace points |
| B. | break points |
| C. | compile |
| D. | both trace and break points |
| Answer» E. | |
| 13. |
The program used to find out errors is called |
| A. | debugger |
| B. | compiler |
| C. | assembler |
| D. | scanner |
| Answer» B. compiler | |
| 14. |
           is/are types of exceptions. |
| A. | trap |
| B. | interrupt |
| C. | system calls |
| D. | all of the mentioned |
| Answer» E. | |
| 15. |
If during the execution of an instruction an exception is raised then |
| A. | the instruction is executed and the exception is handled |
| B. | the instruction is halted and the exception is handled |
| C. | the processor completes the execution and saves the data and then handle the exception |
| D. | none of the mentioned |
| Answer» C. the processor completes the execution and saves the data and then handle the exception | |
| 16. |
Interrupts initiated by an instruction is called as |
| A. | internal |
| B. | external |
| C. | hardware |
| D. | software |
| Answer» C. hardware | |
| 17. |
The added output of the bits of the interrupt register and the mask register is set as an input of |
| A. | priority decoder |
| B. | priority encoder |
| C. | process id encoder |
| D. | multiplexer |
| Answer» C. process id encoder | |
| 18. |
                              register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt. |
| A. | mass |
| B. | mark |
| C. | make |
| D. | mask |
| Answer» E. | |
| 19. |
              interrupt method uses register whose bits are set separately by interrupt signal for each device. |
| A. | parallel priority interrupt |
| B. | serial priority interrupt |
| C. | daisy chaining |
| D. | none of the mentioned |
| Answer» B. serial priority interrupt | |
| 20. |
                    method is used to establish priority by serially connecting all devices that request an interrupt. |
| A. | vectored-interrupting |
| B. | daisy chain |
| C. | priority |
| D. | polling |
| Answer» C. priority | |
| 21. |
In daisy chaining device 0 will pass the signal only if it has |
| A. | interrupt request |
| B. | no interrupt request |
| C. | both no interrupt and interrupt request |
| D. | none of the mentioned |
| Answer» C. both no interrupt and interrupt request | |
| 22. |
Which table handle stores the addresses of the interrupt handling sub- routines? |
| A. | interrupt-vector table |
| B. | vector table |
| C. | symbol link table |
| D. | none of the mentioned |
| Answer» B. vector table | |
| 23. |
The processor indicates to the devices that it is ready to receive interrupts |
| A. | by enabling the interrupt request line |
| B. | by enabling the irq bits |
| C. | by activating the interrupt acknowledge line |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 24. |
The starting address sent by the device in vectored interrupt is called as |
| A. | location id |
| B. | interrupt vector |
| C. | service location |
| D. | service id |
| Answer» C. service location | |
| 25. |
The code sent by the device in vectored interrupt is            long. |
| A. | upto 16 bits |
| B. | upto 32 bits |
| C. | upto 24 bits |
| D. | 4-8 bits |
| Answer» E. | |
| 26. |
In vectored interrupts, how does the device identify itself to the processor? |
| A. | by sending its device id |
| B. | by sending the machine code for the interrupt service routine |
| C. | by sending the starting address of the service routine |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 27. |
The interrupt servicing mechanism in which the requesting device identifies itself to the processor to be serviced is |
| A. | polling |
| B. | vectored interrupts |
| C. | interrupt nesting |
| D. | simultaneous requesting |
| Answer» C. interrupt nesting | |
| 28. |
When dealing with multiple devices interrupts, which mechanism is easy to implement? |
| A. | polling method |
| B. | vectored interrupts |
| C. | interrupt nesting |
| D. | none of the mentioned |
| Answer» B. vectored interrupts | |
| 29. |
Which interrupt is unmaskable? |
| A. | rst 5.5 |
| B. | rst 7.5 |
| C. | trap |
| D. | both rst 5.5 and 7.5 |
| Answer» D. both rst 5.5 and 7.5 | |
| 30. |
An interrupt that can be temporarily ignored is |
| A. | vectored interrupt |
| B. | non-maskable interrupt |
| C. | maskable interrupt |
| D. | high priority interrupt |
| Answer» D. high priority interrupt | |
| 31. |
The resistor which is attached to the service line is called |
| A. | push-down resistor |
| B. | pull-up resistor |
| C. | break down resistor |
| D. | line resistor |
| Answer» C. break down resistor | |
| 32. |
The time between the receiver of an interrupt and its service is |
| A. | interrupt delay |
| B. | interrupt latency |
| C. | cycle time |
| D. | switching time |
| Answer» C. cycle time | |
| 33. |
The signal sent to the device from the processor to the device after receiving an interrupt is |
| A. | interrupt-acknowledge |
| B. | return signal |
| C. | service signal |
| D. | permission signal |
| Answer» B. return signal | |
| 34. |
A single Interrupt line can be used to service n different devices. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 35. |
The interrupt-request line is a part of the |
| A. | data line |
| B. | control line |
| C. | address line |
| D. | none of the mentioned |
| Answer» C. address line | |
| 36. |
The method of accessing the I/O devices by repeatedly checking the status flags is |
| A. | program-controlled i/o |
| B. | memory-mapped i/o |
| C. | i/o mapped |
| D. | none of the mentioned |
| Answer» B. memory-mapped i/o | |
| 37. |
The sub-routine service procedure is similar to that of the interrupt service routine in |
| A. | method of context switch |
| B. | returning |
| C. | process execution |
| D. | method of context switch & process execution |
| Answer» E. | |
| 38. |
The stack frame for each subroutine is present in |
| A. | main memory |
| B. | system heap |
| C. | processor stack |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 39. |
           the most suitable data structure used to store the return addresses in the case of nested subroutines. |
| A. | heap |
| B. | stack |
| C. | queue |
| D. | list |
| Answer» C. queue | |
| 40. |
The data structure suitable for scheduling processes is |
| A. | list |
| B. | heap |
| C. | queue |
| D. | stack |
| Answer» D. stack | |
| 41. |
The reserved memory or private space of the subroutine gets deallocated when |
| A. | the stop instruction is executed by the routine |
| B. | the pointer reaches the end of the space |
| C. | when the routine’s return statement is executed |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 42. |
In the case of nested subroutines, the stack top is always |
| A. | the saved contents of the called sub routine |
| B. | the saved contents of the calling sub routine |
| C. | the return addresses of the called sub routine |
| D. | none of the mentioned |
| Answer» B. the saved contents of the calling sub routine | |
| 43. |
              pointer is used to point to parameters passed or local parameters of the subroutine. |
| A. | stack pointer |
| B. | frame pointer |
| C. | parameter register |
| D. | log register |
| Answer» C. parameter register | |
| 44. |
The private space gets allocated to each subroutine when |
| A. | the first statement of the routine is executed |
| B. | when the context switch takes place |
| C. | when the routine gets called |
| D. | when the allocate instruction is executed |
| Answer» D. when the allocate instruction is executed | |
| 45. |
If the subroutine exceeds the private space allocated to it then the values are pushed onto |
| A. | stack |
| B. | system heap |
| C. | reserve space |
| D. | stack frame |
| Answer» B. system heap | |
| 46. |
The private work space dedicated to a subroutine is called as |
| A. | system heap |
| B. | reserve |
| C. | stack frame |
| D. | allocation |
| Answer» D. allocation | |
| 47. |
The most Flexible way of logging the return addresses of the subroutines is by using |
| A. | registers |
| B. | stacks |
| C. | memory locations |
| D. | none of the mentioned |
| Answer» C. memory locations | |
| 48. |
The most efficient way of handling parameter passing is by using |
| A. | general purpose registers |
| B. | stacks |
| C. | memory locations |
| D. | none of the mentioned |
| Answer» B. stacks | |
| 49. |
The appropriate return addresses are obtained with the help of          in case of nested routines. |
| A. | mar |
| B. | mdr |
| C. | buffers |
| D. | stack-pointers |
| Answer» E. | |
| 50. |
In case of nested subroutines the return addresses are stored in |
| A. | system heap |
| B. | special memory buffers |
| C. | processor stack |
| D. | registers |
| Answer» D. registers | |