MCQOPTIONS
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MCQOPTIONS
This section includes 657 Mcqs, each offering curated multiple-choice questions to sharpen your Testing Subject knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
____ instruction is used to set up a frame pointer for the sub routines in 68000 |
| A. | CREATE |
| B. | LINK |
| C. | UNLK |
| D. | FRAME |
| Answer» C. UNLK | |
| 2. |
The main importance of ARM micro-processors is providing operation with __ |
| A. | Low cost and low power consumption |
| B. | Higher degree of multi-tasking |
| C. | Lower error or glitches |
| D. | Efficient memory management |
| Answer» B. Higher degree of multi-tasking | |
| 3. |
The LINK instruction is always followed by ______ instruction. |
| A. | MOV |
| B. | UNLK |
| C. | UNLK |
| D. | MOVEM |
| Answer» E. | |
| 4. |
The 68000 uses _____ method to access I/O devices buffers. |
| A. | Memory mapped |
| B. | I/O mapped |
| C. | Buffer mapped |
| D. | None of the mentioned |
| Answer» B. I/O mapped | |
| 5. |
The purpose of using DBcc as branch instruction is _ |
| A. | It provides two conditions to be satisfied for branch to occur |
| B. | It provides a counter to check the number of times the branch as taken place |
| C. | It is used to check condition along with the branch condition |
| D. | None of the mentioned |
| Answer» E. | |
| 6. |
As the instructions can deal with variable size operands we use _____ to resolve this |
| A. | Delimiter |
| B. | Size indicator mnemonic |
| C. | Special assemblers |
| D. | None of the mentioned |
| Answer» C. Special assemblers | |
| 7. |
Instructions which can handle any type of addressing mode are said to be _ |
| A. | Omniscious |
| B. | Orthogonal |
| C. | Versatile |
| D. | None of the mentioned |
| Answer» C. Versatile | |
| 8. |
The addresses generated by the 68000 is _____ bit. |
| A. | 32 |
| B. | 16 |
| C. | 24 |
| D. | 42 |
| Answer» D. 42 | |
| 9. |
The 68000 uses _____ address assignment. |
| A. | Big Endian |
| B. | Little Endian |
| C. | X-Little Endian |
| D. | X-Big Endian |
| Answer» B. Little Endian | |
| 10. |
When an operand is stored in a register it is ___ |
| A. | Stored in the lower order bits of the register |
| B. | Stored in the higher order bits of the register |
| C. | Stored in any of the bits at random |
| D. | None of the mentioned |
| Answer» B. Stored in the higher order bits of the register | |
| 11. |
The word length in the 68000 computer is __ |
| A. | 32 bit |
| B. | 64 bit |
| C. | 16 bit |
| D. | 8 bit |
| Answer» D. 8 bit | |
| 12. |
____ register is designated to point to the 68000 processor stack. |
| A. | A7 register |
| B. | B2 register |
| C. | There is no such designation |
| D. | Any general purpose register is selected at random |
| Answer» B. B2 register | |
| 13. |
The TLB is incorporated as part of the _____ |
| A. | Processor |
| B. | MMU |
| C. | Disk |
| D. | RAM |
| Answer» C. Disk | |
| 14. |
Whenever a request to the page that is not present in the main memory is accessed ______ is triggered. |
| A. | Interrupt |
| B. | Request |
| C. | Page fault |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 15. |
If the page table is large then it is stored in ___ |
| A. | Processor |
| B. | Main memory |
| C. | Disk |
| D. | Secondary storage |
| Answer» C. Disk | |
| 16. |
The bit used to store whether the page as been modified or not is called as _ |
| A. | Dirty bit |
| B. | Modify bit |
| C. | Relocation bit |
| D. | None of the mentioned |
| Answer» B. Modify bit | |
| 17. |
The bits used to indicate the status of the page in the memory is called ___ |
| A. | Control bits |
| B. | Status bits |
| C. | Progress bit |
| D. | None of the mentioned |
| Answer» B. Status bits | |
| 18. |
The starting address of the page table is stored in __ |
| A. | TLB |
| B. | R0 |
| C. | Page table base register |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 19. |
The area in the main memory that can hold one page is called as __ |
| A. | Page entry |
| B. | Page frame |
| C. | Frame |
| D. | Block |
| Answer» C. Frame | |
| 20. |
The lower order bits of the virtual address forms the __ |
| A. | Page number |
| B. | Frame number |
| C. | Block number |
| D. | Offset |
| Answer» E. | |
| 21. |
The page length shouldn’t be too long because |
| A. | It reduces the program efficiency |
| B. | It increases the access time |
| C. | It leads to wastage of memory |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 22. |
The higher order bits of the virtual address generated by the processor forms the ____ |
| A. | Table number |
| B. | Frame number |
| C. | List number |
| D. | Page number |
| Answer» E. | |
| 23. |
The pages size shouldn’t be too small, as this would lead to |
| A. | Transfer errors |
| B. | Increase in operation time |
| C. | Increase in access time |
| D. | Decrease in performance |
| Answer» D. Decrease in performance | |
| 24. |
The cache bridges the speed gap between ______ and ____ |
| A. | RAM and ROM |
| B. | RAM and Secondary memory |
| C. | Processor and RAM |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 25. |
For converting virtual address into physical address, the programs are divided into __ |
| A. | Pages |
| B. | Frames |
| C. | Segments |
| D. | Blocks |
| Answer» B. Frames | |
| 26. |
EPIC stands for |
| A. | Explicitly Parallel Instruction Computing |
| B. | External Peripheral Integrating Component |
| C. | External Parallel Instruction Computing |
| D. | None of the mentioned |
| Answer» B. External Peripheral Integrating Component | |
| 27. |
To compute the direction of the branch the VLIW uses __ |
| A. | Seekers |
| B. | Heuristics |
| C. | Direction counter |
| D. | Compass |
| Answer» C. Direction counter | |
| 28. |
The VLIW processors are much simpler as they don not require of _ |
| A. | Computational register |
| B. | Complex logic circuits |
| C. | SSD slots |
| D. | Scheduling hardware |
| Answer» E. | |
| 29. |
The parallel execution of operations in VLIW is done according to the schedule determined by _ |
| A. | Task scheduler |
| B. | Interpreter |
| C. | Compiler |
| D. | Encoder |
| Answer» D. Encoder | |
| 30. |
The important feature of the VLIW is __ |
| A. | ILP |
| B. | Cost effectiveness |
| C. | Performance |
| D. | None of the mentioned |
| Answer» B. Cost effectiveness | |
| 31. |
VLIW stands for |
| A. | Very Long Instruction Word |
| B. | Very Long Instruction Width |
| C. | Very Large Instruction Word |
| D. | Very Long Instruction Width |
| Answer» B. Very Long Instruction Width | |
| 32. |
The method followed in case of node failure, wherein the node gets disabled is _ |
| A. | STONITH |
| B. | Fibre channel |
| C. | Fencing |
| D. | None of the mentioned |
| Answer» B. Fibre channel | |
| 33. |
The cluster formation in which the work is divided equally among the systems is __ |
| A. | Load-configuration |
| B. | Load-Division |
| C. | Light head |
| D. | Both Load-configuration and Load-Division |
| Answer» B. Load-Division | |
| 34. |
The beowolf structure follows the _____ approach of relationship between the systems. |
| A. | Master-slave |
| B. | Asynchronous |
| C. | Synchronous |
| D. | Isochronous |
| Answer» B. Asynchronous | |
| 35. |
The most common modes of communication in clusters is/are __ |
| A. | Message queues |
| B. | Message passing interface |
| C. | PVm |
| D. | Both Message passing interface and PVm |
| Answer» E. | |
| 36. |
The software which governs the group of computers is __ |
| A. | Driver Rd45 |
| B. | Interfacor UI |
| C. | Clustering middleware |
| D. | Distributor |
| Answer» D. Distributor | |
| 37. |
The computer cluster architecture emerged as a result of ___ |
| A. | ISA |
| B. | Workstation |
| C. | Super computers |
| D. | Distributed systems |
| Answer» E. | |
| 38. |
The algorithm followed in most of the systems to perform out of order execution is _ |
| A. | Tomasulo algorithm |
| B. | Score carding |
| C. | Reader-writer algorithm |
| D. | None of the mentioned |
| Answer» B. Score carding | |
| 39. |
The each computer in a cluster is connected using _ |
| A. | UTP |
| B. | Rj-45 |
| C. | STP |
| D. | Coaxial cable |
| Answer» C. STP | |
| 40. |
The set of loosely connected computers are called as __ |
| A. | LAN |
| B. | WAN |
| C. | Workstation |
| D. | Cluster |
| Answer» E. | |
| 41. |
The problem where process concurrency becomes an issue is called as ___ |
| A. | Philosophers problem |
| B. | Bakery problem |
| C. | Bankers problem |
| D. | Reader-writer problem |
| Answer» E. | |
| 42. |
The stalling of the processor due to the unavailability of the instructions is called as _ |
| A. | Control hazard |
| B. | structural hazard |
| C. | Input hazard |
| D. | None of the mentioned |
| Answer» B. structural hazard | |
| 43. |
___ method is used in centralized systems to perform out of order execution. |
| A. | Scorecard |
| B. | Score boarding |
| C. | Optimizing |
| D. | Redundancy |
| Answer» C. Optimizing | |
| 44. |
The time lost due to branch instruction is often referred to as _ |
| A. | Latency |
| B. | Delay |
| C. | Branch penalty |
| D. | None of the mentioned |
| Answer» D. None of the mentioned | |
| 45. |
Any condition that causes a processor to stall is called as _ |
| A. | Hazard |
| B. | Page fault |
| C. | System error |
| D. | None of the mentioned |
| Answer» B. Page fault | |
| 46. |
The situation where in the data of operands are not available is called _ |
| A. | Data hazard |
| B. | Stock |
| C. | Deadlock |
| D. | Structural hazard |
| Answer» B. Stock | |
| 47. |
The contention for the usage of a hardware device is called as _ |
| A. | Structural hazard |
| B. | Stalk |
| C. | Deadlock |
| D. | None of the mentioned |
| Answer» B. Stalk | |
| 48. |
In CISC architecture most of the complex instructions are stored in _ |
| A. | Register |
| B. | Diodes |
| C. | CMOS |
| D. | Transistors |
| Answer» E. | |
| 49. |
Pipe-lining is a unique feature of _ |
| A. | RISC |
| B. | CISC |
| C. | ISA |
| D. | IANA |
| Answer» B. CISC | |
| 50. |
The iconic feature of the RISC machine among the following are |
| A. | Reduced number of addressing modes |
| B. | Increased memory size |
| C. | Having a branch delay slot |
| D. | All of the mentioned |
| Answer» D. All of the mentioned | |