MCQOPTIONS
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This section includes 8 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
A principle regarding most display decoders is that when the correct input is present, the related output will switch ____________ |
| A. | HIGH |
| B. | To high impedance |
| C. | To an open |
| D. | LOW |
| Answer» E. | |
| 2. |
A 4-bit counter has a maximum modulus of ____________ |
| A. | 3 |
| B. | 6 |
| C. | 8 |
| D. | 16 |
| Answer» E. | |
| 3. |
Three cascaded decade counters will divide the input frequency by ____________ |
| A. | 10 |
| B. | 20 |
| C. | 100 |
| D. | 1000 |
| Answer» E. | |
| 4. |
A 4-bit ripple counter consists of flip-flops, which each have a propagation delay from clock to Q output of 15 ns. For the counter to recycle from 1111 to 0000, it takes a total of ____________ |
| A. | 15 ns |
| B. | 30 ns |
| C. | 45 ns |
| D. | 60 ns |
| Answer» E. | |
| 5. |
A 5-bit asynchronous binary counter is made up of five flip-flops, each with a 12 ns propagation delay. The total propagation delay (tp(total)) is ____________ |
| A. | 12 ms |
| B. | 24 ns |
| C. | 48 ns |
| D. | 60 ns |
| Answer» E. | |
| 6. |
The terminal count of a typical modulus-10 binary counter is ____________ |
| A. | 0000 |
| B. | 1010 |
| C. | 1001 |
| D. | 1111 |
| Answer» D. 1111 | |
| 7. |
Internal propagation delay of asynchronous counter is removed by ____________ |
| A. | Ripple counter |
| B. | Ring counter |
| C. | Modulus counter |
| D. | Synchronous counter |
| Answer» E. | |
| 8. |
A ripple counter s speed is limited by the propagation delay of _____________ |
| A. | Each flip-flop |
| B. | All flip-flops and gates |
| C. | The flip-flops only with gates |
| D. | Only circuit gates |
| Answer» B. All flip-flops and gates | |