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MCQOPTIONS
This section includes 2171 Mcqs, each offering curated multiple-choice questions to sharpen your ENGINEERING SERVICES EXAMINATION (ESE) knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
In 8086, which instruction at the end of a sub-routine takes the execution back to the main program? |
| A. | JMP |
| B. | END |
| C. | CALL |
| D. | RET |
| Answer» E. | |
| 2. |
Latches are _______ circuits. |
| A. | edge triggered |
| B. | pulse triggered |
| C. | count triggered |
| D. | level triggered |
| Answer» E. | |
| 3. |
In 8085 microprocessor system with memory mapped I/O, which of the following is true? |
| A. | Devices have 8-bit address line |
| B. | Devices are accessed using IN and OUT instructions |
| C. | There can be Maximum of 256 input devices and 256 output devices |
| D. | Arithmetic and logic operations can be directly performed with the I/O data |
| Answer» E. | |
| 4. |
If 8085 microprocessor adds 87 H and 79 H, the flags will be: |
| A. | S - 1, Z - 0, AC - 0 and Cy - 1 |
| B. | S - 0, Z - 0, AC - 1 and Cy - 0 |
| C. | S - 1, Z - 1, AC - 1 and Cy - 1 |
| D. | S - 0, Z - 1, AC - 1 and Cy - 1 |
| Answer» E. | |
| 5. |
8051 can access up to ______ of program memory and ______ of external data memory. |
| A. | 64 KB, 32 KB |
| B. | 32 KB, 64 KB |
| C. | 64 KB, 64 KB |
| D. | 16 KB, 64 KB |
| Answer» D. 16 KB, 64 KB | |
| 6. |
In which unit is the performance of cache memory measured? |
| A. | Baud Rate |
| B. | Bit Rate |
| C. | Hit ratio |
| D. | Miss Ratio |
| Answer» D. Miss Ratio | |
| 7. |
Identify the gate from the truth tableInputOutputAB 001010100111 |
| A. | NOR |
| B. | NAND |
| C. | XNOR |
| D. | XOR |
| Answer» D. XOR | |
| 8. |
Name of the register which stores the address of the next instruction to be executed in 8085 in microprocessor |
| A. | Stack pointer |
| B. | Accumulator |
| C. | Program counter |
| D. | Index register |
| Answer» D. Index register | |
| 9. |
Cycle stealing mode of DMA operation involves |
| A. | DMA-controlled taking on the address, data and control buses, while a block of data is transformed between memory and the I/O device |
| B. | While the microprocessor is executing a programme, an interface circuit takes control of the address, data and control buses, when not in use by the microprocessor |
| C. | The data transfer takes place, between I/O device and memory during every alternate clock cycle |
| D. | The DMA controller working for the microprocessor to finish execution of the programme and then takes over the buses |
| Answer» C. The data transfer takes place, between I/O device and memory during every alternate clock cycle | |
| 10. |
Minimum number of flip flops required for mod-12 ripple counter is |
| A. | 3 |
| B. | 4 |
| C. | 6 |
| D. | 12 |
| Answer» C. 6 | |
| 11. |
_______ are an example of a combinational circuit. |
| A. | Shift Registers |
| B. | Multiplexers |
| C. | Counters |
| D. | Flip-Flops |
| Answer» C. Counters | |
| 12. |
A digital voltmeter uses a 10 MHz clock and has a voltage controlled generator which provides a width of 10 μs per volt of unit signal. 10V of input signal would correspond to a pulse count of |
| A. | 1500 |
| B. | 750 |
| C. | 1000 |
| D. | 500 |
| Answer» D. 500 | |
| 13. |
In Boolean algebra \(\overline {A + B} =\) ? |
| A. | \(\bar A + \bar B\) |
| B. | \(\bar A.\bar B\) |
| C. | \(A + \bar B\) |
| D. | B + A |
| Answer» C. \(A + \bar B\) | |
| 14. |
An Input/output processor controls the flow of information between |
| A. | Cache memory and Input/output devices |
| B. | Main memory and Input/output devices |
| C. | Two Input/output devices |
| D. | Cache and Main memories |
| Answer» C. Two Input/output devices | |
| 15. |
If the inputs of the ‘AND’ gate are “A & B”, then the output (Y) = |
| A. | Y = A . B |
| B. | Y = A – B |
| C. | Y = A + B |
| D. | \(Y = \overline {AB} \) |
| Answer» B. Y = A – B | |
| 16. |
Counter design can be implemented by: |
| A. | Flip - Flops |
| B. | Full Adders |
| C. | Half Adders |
| D. | Multiplexers |
| Answer» B. Full Adders | |
| 17. |
In PIC 16F877, a byte at a program memory address 0 x 0800 can be accessed directly by using: |
| A. | 10-bit page offset address 0 x 189 at page 1 |
| B. | 10-bit page offset address 0 x 100 at page 0 |
| C. | 11-bit page offset address 0 x 000 at page 0 |
| D. | 11-bit page offset address 0 x 000 at page 1 |
| Answer» D. 11-bit page offset address 0 x 000 at page 1 | |
| 18. |
Group of 4 bits forms a |
| A. | Byte |
| B. | Nibble |
| C. | Gigabyte |
| D. | Terabyte |
| Answer» C. Gigabyte | |
| 19. |
Any combinational circuit can be designed using only |
| A. | AND gates |
| B. | OR gates |
| C. | XOR gates |
| D. | NOR gates |
| Answer» E. | |
| 20. |
In writing the micro-program, there are two situations in which a field of the micro instruction can be kept blank when it:1. Controls a functional unit2. Causes state to be written3. Specifies the control of a multiplexer |
| A. | 1 and 2 only |
| B. | 2 and 3 only |
| C. | 1 and 3 only |
| D. | 1, 2 and 3 |
| Answer» D. 1, 2 and 3 | |
| 21. |
In microprocessor architecture the flag indicates |
| A. | The number of microprocessor |
| B. | The name of the manufacturer |
| C. | The internal status of the CPU |
| D. | The bit-size of the microprocessor |
| Answer» D. The bit-size of the microprocessor | |
| 22. |
Binary equivalent of (45)10 is |
| A. | (11101)2 |
| B. | (11110)2 |
| C. | (101101)2 |
| D. | (110101)2 |
| Answer» D. (110101)2 | |
| 23. |
In 8051, Pin number 30 is used: |
| A. | To control the signal to enable the external memory |
| B. | To control the demultiplexing address and data bus |
| C. | for I/O ports |
| D. | for the interface of external devices |
| Answer» C. for I/O ports | |
| 24. |
A single instruction to clear the higher four bits of the accumulator in 8085 assembly language is |
| A. | XRI OFH |
| B. | ANI FOH |
| C. | XRI FOH |
| D. | ANI OFH |
| Answer» E. | |
| 25. |
After the execution of the given statements, determine the status of CY, AC and P flags.MOV A,#9CHADD A,#64H |
| A. | CY = 0, AC = 1, P = 1 |
| B. | CY = 1, AC = 1, P = 0 |
| C. | CY = 1, AC = 0, P = 0 |
| D. | CY = 0, AC = 1, P = 0 |
| Answer» C. CY = 1, AC = 0, P = 0 | |
| 26. |
A ring counter with 5 flip-flops will have: |
| A. | 5 states |
| B. | 32 states |
| C. | 10 states |
| D. | Infinite |
| Answer» B. 32 states | |
| 27. |
In a sequential circuit, the outputs at any instant of time depends |
| A. | only on the inputs present at that instant of time |
| B. | on past outputs as well as present inputs |
| C. | only on the past inputs |
| D. | only on the present outputs |
| Answer» C. only on the past inputs | |
| 28. |
An example of a spooled device is: |
| A. | A graphical display device |
| B. | A line printer used to print the output of a number of jobs |
| C. | A secondary storage device in a virtual memory system |
| D. | A terminal used to enter input data to a running program |
| Answer» B. A line printer used to print the output of a number of jobs | |
| 29. |
How many bits are used in the data bus of 8051 ? |
| A. | 8 |
| B. | 16 |
| C. | 32 |
| D. | 24 |
| Answer» B. 16 | |
| 30. |
A 4 bit counter is used to count form 0, 1, 2 …. n. Value of ‘n’ is |
| A. | 16 |
| B. | 15 |
| C. | 32 |
| D. | 31 |
| Answer» C. 32 | |
| 31. |
8051 has _______ special function registers. |
| A. | 21 |
| B. | 8 |
| C. | 16 |
| D. | 11 |
| Answer» B. 8 | |
| 32. |
In the figure shown, D0 and D1 are digital inputs, S is a control input and Y is the output. When S=0, then Y=D0. When S=1, then Y=D1. The given combinational circuit is |
| A. | 2 input decoder |
| B. | 2 input multiplexer |
| C. | Full Adder |
| D. | Shift Register |
| Answer» C. Full Adder | |
| 33. |
A controller that takes control of the buses and transfers data directly between source and destination bypassing the microprocessor is known as |
| A. | DMA controller |
| B. | read-write controller |
| C. | high-speed controller |
| D. | master-slave controller |
| Answer» B. read-write controller | |
| 34. |
A three Input NOR gate gives high O/P when _______. |
| A. | one I/P is high |
| B. | one I/P is low |
| C. | all I/P are low |
| D. | all I/P are high |
| Answer» D. all I/P are high | |
| 35. |
Direction: Given question consists of two statements, one labeled as the 'Assertion (A)' and the other as 'Reason (R)'. You are to examine these two statements carefully and select the answers to these items using the codes given below.Assertion (A): The activity reading from or writing into one of the stand-alone registers and into the register file is the same.Reason (R): The register file has additional control and access overhead compared to the single stand-alone register. |
| A. | Both A and R are individually true and R is the correct explanation of A |
| B. | Both A and R are individually true but R is NOT the correct explanation of A |
| C. | A is true but R is false |
| D. | A is false but R is true |
| Answer» E. | |
| 36. |
Race around condition can be removed by using the combination of: |
| A. | Half Adders |
| B. | Multipliers |
| C. | Master-Slave J-K Flip-Flop |
| D. | S-R Flip Flop |
| Answer» D. S-R Flip Flop | |
| 37. |
A combinational PLD with a programmable AND array and a programmable OR array is called a |
| A. | PROM |
| B. | PLD |
| C. | PLA |
| D. | PAL |
| Answer» D. PAL | |
| 38. |
Cache memory is logically positioned |
| A. | Between main memory and secondary memory |
| B. | Between CPU and main memory |
| C. | Inside the Central Processing Unit |
| D. | Inside the Input/output processor |
| Answer» C. Inside the Central Processing Unit | |
| 39. |
In 8085 microprocessor, the value of the most significant bit of the result following the execution of any arithmetic or Boolean instruction is stored in the |
| A. | Carry status flag |
| B. | Parity flag |
| C. | Sign flag |
| D. | Zero Flag |
| Answer» D. Zero Flag | |
| 40. |
Match List-I with List-II and select the correct answer using the code given below the lists:List-IList-IIA.DMA I / O1.High-speed RAMB.Cache2.DiskC.Interrupt I / O3.PrinterD.Condition coderegisters4.ALU |
| A. | A-4, B-1, C-3, D-2 |
| B. | A-2, B-1, C-3, D-4 |
| C. | A-4, B-3, C-1, D-2 |
| D. | A-2, B-3, C-1, D-4 |
| Answer» C. A-4, B-3, C-1, D-2 | |
| 41. |
Radix 2 is used for representing |
| A. | hexadecimal numbers |
| B. | octal numbers |
| C. | binary numbers |
| D. | decimal numbers |
| Answer» D. decimal numbers | |
| 42. |
Consider the following statements:The 8259A Programmable Interrupt Controller can1. Manage eight interrupts2. Vector can interrupt request anywhere in the memory map3. Have an 8-bit or 16-bit interval between interrupt vector locations4. Be initialized with operational command wordsWhich of the above statements are correct? |
| A. | 1, 2 and 3 only |
| B. | 1, 2 and 4 only |
| C. | 3 and 4 only |
| D. | 1, 2, 3 and 4 |
| Answer» E. | |
| 43. |
A 4 bit ripple counter and a 4 bit synchronous counter are made by flips flops having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then |
| A. | R = 10 ns, S = 40 ns |
| B. | R = 40 ns, S = 10 ns |
| C. | R = 10 ns, S = 30 ns |
| D. | R = 30 ns, S = 10 ns |
| Answer» C. R = 10 ns, S = 30 ns | |
| 44. |
SSI refers to ICs with |
| A. | less than 12 gates on the same chip |
| B. | less than 8 gates on the same chip |
| C. | less than 6 gates on the same chip |
| D. | less than 3 gates on the same chip |
| Answer» B. less than 8 gates on the same chip | |
| 45. |
Karnaugh map can not be drawn when the number of variables is more than 4 |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» C. May be True or False | |
| 46. |
A JK flip flop has tpd= 12 ns. The largest modulus of a ripple counter using these flip flops and operating at 10 MHz is |
| A. | 16 |
| B. | 64 |
| C. | 128 |
| D. | 256 |
| Answer» E. | |
| 47. |
An 8 bit DAC has a full scale output of 2 mA and full scale error of ± 0.5%. If input is 10000000 the range of outputs is |
| A. | 994 to 1014 μA |
| B. | 990 to 1020 μA |
| C. | 800 to 1200 μA |
| D. | none of the above |
| Answer» B. 990 to 1020 μA | |
| 48. |
If modulus is less than 2ᴺ, some states of the counter are skipped by using NAND gates. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» B. False | |
| 49. |
A 10 bit ADC with a full scale output voltage of 10.24 V is to be designed to have ± LSB/2 accuracy. If ADC is calibrated at 25°C, the maximum net temperature coefficient of ADC should not exceed |
| A. | ± 200 μV/°C |
| B. | ± 400 μV/°C |
| C. | ± 600 μV/°C |
| D. | ± 800 μV/°C |
| Answer» B. ± 400 μV/°C | |
| 50. |
What is the length of SP (Stack pointer) of 8085 μp? |
| A. | 6 bits |
| B. | 8 bits |
| C. | 12 bits |
| D. | 16 bits |
| Answer» E. | |