MCQOPTIONS
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MCQOPTIONS
This section includes 8 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Circuits knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
The summing outputs of a half or full-adder are designated by which Greek symbol? |
| A. | Omega |
| B. | Theta |
| C. | Lambda |
| D. | Sigma |
| Answer» E. | |
| 2. |
The main disadvantage of Manchester carry chain is ___________ |
| A. | Ripple factor |
| B. | Propagation delay |
| C. | Capacitive load |
| D. | Both propagation delay and capacitive load |
| Answer» E. | |
| 3. |
What is Manchester carry chain? |
| A. | Is a chain of controlled inverter |
| B. | Variation of a carry-lookahead adder |
| C. | Variation of a full-adder |
| D. | Variation of a ripple carry adder |
| Answer» C. Variation of a full-adder | |
| 4. |
The carry propagation delay in 4-bit full-adder circuits ___________ |
| A. | Is cumulative for each stage and limits the speed at which arithmetic operations are performed |
| B. | Is normally not a consideration because the delays are usually in the nanosecond range |
| C. | Decreases in direct ratio to the total number of full-adder stages |
| D. | Increases in direct ratio to the total number of full-adder stages but is not a factor in limiting the speed of arithmetic operations |
| Answer» B. Is normally not a consideration because the delays are usually in the nanosecond range | |
| 5. |
Carry lookahead logic uses the concepts of ___________ |
| A. | Inverting the inputs |
| B. | Complementing the outputs |
| C. | Generating and propagating carries |
| D. | Ripple factor |
| Answer» D. Ripple factor | |
| 6. |
One way to make a four-bit adder to perform subtraction is by ___________ |
| A. | Inverting the output |
| B. | Inverting the carry-in |
| C. | Inverting the B inputs |
| D. | Grounding the B inputs |
| Answer» D. Grounding the B inputs | |
| 7. |
Fast-look-ahead carry circuits found in most 4-bit full-adder circuits which ___________ |
| A. | Determine sign and magnitude |
| B. | Reduce propagation delay |
| C. | Add a 1 to complemented inputs |
| D. | Increase ripple delay |
| Answer» C. Add a 1 to complemented inputs | |
| 8. |
For a 4-bit parallel adder, if the carry-in is connected to a logical HIGH, the result is ___________ |
| A. | The same as if the carry-in is tied LOW since the least significant carry-in is ignored |
| B. | That carry-out will always be HIGH |
| C. | A one will be added to the final result |
| D. | The carry-out is ignored |
| Answer» D. The carry-out is ignored | |