The following switching functions are to be implemented using a decode – McqOptions

MCQOPTIONS

1.	The following switching functions are to be implemented using a decoder f1 = ∑m (1, 2, 4, 8, 10, 14)f2 = ∑m (2, 5, 9, 15)f3 = ∑m (2, 4, 5, 6, 7) The minimum configuration of decoder is
A.	2 to 4 line
B.	3 to 8 line
C.	4 to 16 line
D.	5 to 32 line
Answer» D. 5 to 32 line

Discussion

No Comment Found

Related MCQs

(1(10101)2 is_______________?
In figure, R = 20KΩ and C = 75 pF. The converter clock frequency will be
figure shows three pulse train inputs to a 3-input OR gate. Assuming positive logic, the output pulse rate train in figure (b) would be
figure shows three pulse train inputs to a 3-input AND gate. Assuming positive logic, the output signal obtained in figure would be
For a D/A converter, inputs and outputs are given. The output corresponding to digital input 01000
Assume that only x and y logic inputs are available. What is the minimum number of 2-input NAND gates required to implement x ⊕ y?
In a digital system, the maximum clock frequency that can be used with Master/Slave Clocked flip-flops having total propagation delay of 200 μsec is
The ASCII code is for information interchange by a binary code for
The PC contains 0450 H and SP contains 08D 6 H. What will be content of P and SP following a CALL to subroutine at location 02 AFH?
What is the memory word size of 8085 μp?