1.

Referring to Figure 7-7, what action takes place at point \"W\" on the timing diagram?

A. The parallel inputs are inhibited, that is, prevented from loading into the register.
B. Data is loaded into the register from the parallel inputs.
C. The outputs are cleared; set to LOW.
D. The serial inputs are loaded into the register.
Answer» C. The outputs are cleared; set to LOW.


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